4.8. Dynamic Memory Controller, DMC

The PL340 PrimeCell Dynamic Memory Controller (DMC) is an AMBA compliant SoC peripheral that is developed, tested, and licensed by ARM Limited.

Table 4.39. DMC implementation

PropertyValue
Location Northbridge
Memory base address0x100E0000
Interrupt
DMA
Release versionARM DMC PL340 r0p0
Reference documentation

ARM PrimeCell Dynamic Memory Controller (PL340) Technical Reference Manual

See also Remapping of boot memory.


The DMC controls the 512MB of DDR 100MHz dynamic memory that is available on the baseboard. Sample programs that configure and use dynamic memory can be found on the CD that accompanies the baseboard.

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