4.11.1. Interrupt signals

The GIC interrupt allocation is listed in Table 4.44.

Note

Refer to the application note for your product for details on how interrupts are handled for your system and the interrupts signals present on the connectors.

Table 4.44. GIC interrupt allocation

INT IDInterruptSourceDescriptionFrom
[95]nDMAEXTERRIRQCortex-A8 test chipDMA interrupt

TC_INT

[3:0]

[94]nDMASIRQCortex-A8 test chipDMA interrupt

TC_INT

[3:0]

[93]nDMAIRQCortex-A8 test chipDMA interrupt

TC_INT

[3:0]

[92]COMMTXCortex-A8 test chipDCC transmit side interruptCOMMTX
[91]COMMRXCortex-A8 test chipDCC receive side interrupt

COMMRX

[90]nCTIIRQCortex-A8 test chipCross trigger interrupt

TC_INT

[3:0]

[89]P_nINT[7]PB-A8PCI Express-to-PCI-X bridge (PEX8114) P_nINTD

Ext INT[a]

source

[88]P_nINT[6]PB-A8PCI Express-to-PCI-X bridge (PEX8114) P_nINTC

Ext INT

source

[87]P_nINT[5]PB-A8PCI Express-to-PCI-X bridge (PEX8114) P_nINTB

Ext INT

source

[86]P_nINT[4]PB-A8PCI Express-to-PCI-X bridge (PEX8114) P_nINTA

Ext INT

source

[85]P_nINT[3]PB-A8PCI-X SLOT A P_nINTD or SLOT B P_nINTB

Ext INT

source

[84]P_nINT[2]PB-A8PCI-X SLOT A P_nINTB or SLOT B P_nINTA

Ext INT

source

[83]P_nINT[1]PB-A8PCI-X SLOT A P_nINTA or SLOT B P_nINTD

Ext INT

source

[82]P_nINT[0]PB-A8PCI-X SLOT A P_nINTD or SLOT B P_nINTC

Ext INT

source

[81]P_NMIPB-A8Southbridge PCI bridge NMI

Ext INT

source

[80]PCI_INTRPB-A8Southbridge PCI bridge INT

Ext INT

source

[79]nPMUIRQCortex-A8 test chipSystem metrics interrupt

Ext INT

source

[78]ReservedNorthbridge

Ext INT

source

[77]ReservedNorthbridge

Ext INT

source

[76]ReservedNorthbridge

Ext INT

source

[75]ReservedNorthbridge

Ext INT

source

[74]Timer 6-7SouthbridgeTimers 6 and 7

Ext INT

source

[73]Timer 4-5SouthbridgeTimers 4 and 5

Ext INT

source

[72]Watchdog1SouthbridgeWatchdog 1 alarm

Ext INT

source

[71]T1_INT7Tile Site

Interrupts from tile site

TS_INT

[7:0]

[70]T1_INT6

TS_INT

[7:0]

[69]T1_INT5

TS_INT

[7:0]

[68]T1_INT4

TS_INT

[7:0]

[67]T1_INT3

TS_INT

[7:0]

[66]T1_INT2

TS_INT

[7:0]

[65]T1_INT1

TS_INT

[7:0]

[64]T1_INT0

TS_INT

[7:0]

[63]Reserved

Ext INT[a]

source

[62]Reserved

Ext INT

source

[61]USBPB-A8Interrupt from USB controller IC

Ext INT

source

[60]EthernetPB-A8Interrupt from Ethernet controller IC

Ext INT

source

[59]Reserved

Ext INT

source

[58]PISMOPB-A8PISMO interrupt from memory expansion board

Ext INT

source

[57]Reserved

Ext INT

source

[56]DMACNorthbridgeDMA controller

Ext INT

source

[55]CLCDNorthbridgeCLCD display

Ext INT

source

[54]ReservedSouthbridgeCharacter LCD display (not currently supported)

Ext INT

source

[53]KMI1SouthbridgeKeyboard/Mouse Interface

Ext INT

source

[52]KMI0SouthbridgeKeyboard/Mouse Interface

Ext INT

source

[51]AACISouthbridgeCODEC controller interrupt

Ext INT

source

[50]MCIbSouthbridgeMultimedia Card Interface interrupt b

Ext INT

source

[49]MCIaSouthbridgeMultimedia Card Interface interrupt a

Ext INT

source

[48]SCISouthbridgeSmart Card interface

Ext INT

source

[47]UART3SouthbridgeUART3

Ext INT

source

[46]UART2SouthbridgeUART2

Ext INT

source

[45]UART1SouthbridgeUART1

Ext INT

source

[44]UART0SouthbridgeUART0

Ext INT

source

[43]SSPSouthbridgeSynchronous serial port

Ext INT

source

[42]RTCSouthbridgeReal time clock

Ext INT

source

[41]Reserved

Ext INT

source

[40]GPIO2SouthbridgeGPIO controller

Ext INT

source

[39]GPIO1SouthbridgeGPIO controller

Ext INT

source

[38]GPIO0SouthbridgeGPIO controller

Ext INT

source

[37]Timer 2-3SouthbridgeTimers 2 and 3

Ext INT

source

[36]Timer 0-1SouthbridgeTimers 0 and 1

Ext INT

source

[35]Reserved

Ext INT

source

[34]Reserved

Ext INT

source

[33]S/W interruptSouthbridgeSoftware interrupt

Ext INT

source

[32]Watchdog0SouthbridgeWatchdog timer 0

Ext INT

source

[31:16]GICSouthbridgereserved for GIC software interrupts

-

[15:0]GICSouthbridgeSoftware interrupts

-

[a] Ext INT = External Interrupt sources


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