A.13.1. JTAG

Figure A.15 shows the pinout of the JTAG connector J10 that is located on the rear panel of the ATX enclosure. All JTAG active HIGH input signals have pull-up resistors.

See Figure 3.3 to locate the connector and see Test, configuration, debug and trace interfaces for a description of how the JTAG config and debug interfaces are implemented on the PB-A8.

Note

The term JTAG equipment refers to any hardware that can drive the JTAG signals to devices in the scan chain. Typically this is RealView ICE, although hardware from other suppliers can also be used to debug ARM processors.

Figure A.15. JTAG connector

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