4.11.3. Handling interrupts

This section describes interrupt handling and clearing in general.

For examples of interrupt detection and handling, see the platform library code supplied on the CD.

All interrupts are routed to all four GICs.

The sequence to determine and clear an interrupt is:

  1. If required, stack the workspace. If interrupt pre-emption is used, also stack R14 and SPSR.

  2. Determine interrupt ID by reading the Interrupt Ack Register of the interface.

  3. If interrupt pre-emption is required, re-enable interrupts by setting CPSR bit 7.

    Caution

    A reentrant interrupt handler must save the IRQ state, switch processor modes, and save the state for the new processor mode before branching to a nested subroutine or C function. See 6.7.3 Reenntrant interrupt handlers in the RealView Compilation Tools Developer Guide for details.

  4. Jump to the interrupt service routine. For hardware-triggered interrupts, the service routine must clear the interrupt in the peripheral by setting the appropriate bit in the peripheral interrupt-control register.

  5. Write the interrupt number to the End of Interrupt Register.

  6. Restore the workspace.

  7. Return from the interrupt.

Note

The peripheral might contain its own interrupt mask and clear registers that must be configured before an interrupt is enabled.

Copyright © 2008-2011 ARM Limited. All rights reserved.ARM DUI 0417D