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| Home > Emulation Baseboard Model: Platform and Components > Differences between the EB hardware and the system model > Timing considerations | |||
The Real-Time System Models provides an environment that enables running software applications in a functionally-accurate simulation. However, because of the relative balance of fast simulation speed over timing accuracy, there are situations where the models might behave unexpectedly.
If your code interacts with real world devices like timers and keyboards, data arrives in the modeled device in real world, or wall clock, time, but simulation time can be running much faster than the wall clock. This means that a single keypress might be interpreted as several repeated key presses, or a single mouse click incorrectly becomes a double click.
To work around this problem, the EB RTSMs supply the Rate
Limit feature. Enabling Rate Limit, either using the Rate Limit
button in the CLCD display, or the rate_limit-enable model instantiation
parameter, forces the model to run at wall clock time. This avoids
issues with two clocks running at significantly different rates.
For interactive applications, ARM recommends enabling Rate Limit.