5.4.11. PL050_KMI_component

The PL050_KMI component is a programmer’s view model of the PL050 Keyboard/Mouse Interface PrimeCell as described in the ARM PrimeCell PS2 Keyboard/Mouse Interface (PL050) Technical Reference Manual.

The component is designed to communicate with models of PS/2-like devices such as a PS2Keyboard or PS2Mouse.

Figure 5.32 shows a view of the component in System Canvas.

Figure 5.32. Keyboard/Mouse controller in System Canvas

Keyboard/Mouse controller in System Canvas

This component is written in LISA+.


Table 5.49 provides a brief description of the ports. See the ARM PrimeCell PS2 Keyboard/Mouse Interface (PL050) Technical Reference Manual.

Table 5.49. PL050_KMI ports

NamePort protocolTypeDescription
pvbusPVBusSlaveSlave port for connection to PV bus master/decoder.
intrSignalMasterMaster port signalling completion of transmit or receive.
clockClockSignalSlaveClock input, typically 1MHz, which sets the master transmit/receive rate.
ps2devicePS2DataSlaveUsed to communicate with a PS/2-like device.


The PL050_KMI component has one additional protocol.

The PS2Data protocol is used for communication between the KMI and a PS/2-like device. For efficiency reasons the interface is implemented as a parallel byte interface rather than a serial clock/data interface. The behaviors are:

setClockData(enum ps2clockdata) : void

Used by the KMI to simulate forcing the state of the data/clock lines. to indicate whether it is able to receive data, wants to send a command, or is inhibiting communication.

getData() : uint8

Used by the PS/2 device to get command data from the KMI.

putData(uint8 data) : void

Used by the PS/2 device to send device data to the KMI.


The PL050_KMI component has no parameters.


Table 5.50 provides a description of the configuration registers for the component.

Table 5.50. PL050_KMI registers

Register nameOffsetAccessDescription
KMICR0x00read/writeControl register
KMISTAT0x04read onlyStatus register
KMIDATA0x08read/writeData register
KMICLKDIV0x0Cread/writeInternal clock divider
KMIR0x10read onlyInterrupt status register
KMIPeriphID00xfe0read onlyPeripheral ID register
KMIPeriphID10xfe4read onlyPeripheral ID register
KMIPeriphID20xfe8read onlyPeripheral ID register
KMIPeriphID30xfecread onlyPeripheral ID register
KMIPCellID00xff0read onlyPrimeCell ID register
KMIPCellID10xff4read onlyPrimeCell ID register
KMIPCellID20xff8read onlyPrimeCell ID register
KMIPCellID30xffcread onlyPrimeCell ID register

Debug features

The PL050_KMI component has no debug features.

Verification and testing

The PL050_KMI component has been tested as part of the VE example system using VE test suites and by booting operating systems.


The PL050_KMI component is not expected to have a significant impact on performance of a PV system. However if it is connected to the Visualisation component, then the performance of the component is dependent on that of the visualization.

Library dependencies

The PL050_KMI component has no dependencies on external libraries.

Copyright © 2008-2013 ARM. All rights reserved.ARM DUI 0423O