A.1.7. An undefined instruction failed its condition code check

Rating: 1.

If an instruction is conditional, and would cause an undefined instruction abort if the condition codes check passes, then the behavior when the condition code check fails can be IMPLEMENTATION DEFINED. A processor can choose to implement such instructions either as a NOP or as causing an undefined exception.

When one of these instructions fails its condition code check, a warning is emitted. Also, by setting option take_ccfail_undef to true, you can configure the model to take the undefined exception (instead of the usual behavior of treating the ccfailed instruction as a NOP).

Currently, the model detects only instructions that are guaranteed to cause an Undefined Instruction exception regardless of processor state. For example, unused encodings in the A32 or T32 instruction sets, missing coprocessors or coprocessor registers, and write accesses to read-only CP15 registers (and vice versa) are all detected. Conversely, instructions that might or might not cause an Undefined Instruction exception, depending on the internal state of the processor, are not detected. For example, the model currently does not detect CP15 instructions that are inaccessible because of privilege or security state. Similarly, the model currently does not detect VFP or NEON instructions that are used when that component has not been properly enabled.

Copyright © 2008-2013 ARM. All rights reserved.ARM DUI 0423O
Non-ConfidentialID060613