2.3.1. Timing

The most important thing that Fast Models do not model is accurate instruction timing. The simulation as a whole has a very accurate concept of timing, but the Code Translation (CT) processors do not dispatch instructions with any claim to simulating device-like timing. In general, a processor issues a set of instructions (a “quantum”) at the same point in simulation time, and then waits for some amount of time before executing the next quantum. The timing is arranged so that the processor averages one instruction per clock tick.

The consequences of this are:

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