4.13.3. Parameters

Table 4.32 provides a description of the configuration parameters for the ARMCortexM3CT component.

Table 4.32. ARMCortexM3CT parameters

ParameterDescriptionTypeAllowed valueDefault value
BIGENDINITInitialize processor to big endian modeBooleantrue/falsefalse
LVL_WIDTHNumber of bits of interrupt priority.Integer3-83
NUM_IRQNumber of user interrupts.Integer1-24016
NUM_MPU_REGIONNumber of MPU regions. Integer0, 88
master_idmaster ID presented in bus transactionsInteger0x0000 - 0xFFFF0x0
min_sync_levelControls the minimum syncLevel.Integer0-30
semihosting-Thumb_SVCT32 SVC number for semihosting.Integer8-bit integer0xAB
semihosting-cmd_line[a]Command line available to semihosting SVC calls.Stringno limit except memory[empty string]
semihosting-enable

Enable semihosting SVC traps.

Caution

Applications that do not use semihosting must set this parameter to false.

Booleantrue or falsetrue
semihosting-heap_baseVirtual address of heap base.Integer0x00000000 - 0xFFFFFFFF0x0
semihosting-heap_limitVirtual address of top of heap.Integer0x00000000 - 0xFFFFFFFF0x10700000
semihosting-stack_baseVirtual address of base of descending stack.Integer0x00000000 - 0xFFFFFFFF0x10700000
semihosting-stack_limitVirtual address of stack limit.Integer0x00000000 - 0xFFFFFFFF0x10800000

[a] The value of argv[0] points to the first command line argument, not to the name of an image.


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