4.18.3. Parameters

Table 4.51 provides a description of the configuration parameters for the ARM926CT component.

Table 4.51. ARM926CT parameters

BIGENDINITinitialize to ARMv5 big endian modeBooleantrue/falsefalse
INITRAMinitialize with ITCM0 enabled at address 0x0Booleantrue/falsefalse
VINITHIinitialize with high vectors enabledBooleantrue/falsefalse
itcm0_sizeSize of ITCM in KB.Integer0x000 - 0x4000x8
dtcm0_sizeSize of DTCM in KB.Integer0x000 - 0x4000x8
device-accurate-tlbSpecify whether all TLBs are modeled.Booleantrue/falsefalse[a]
semihosting-cmd_line[b]command line available to semihosting SVC callsStringno limit except memory[empty string]

Enable semihosting SVC traps.


Applications that do not use semihosting must set this parameter to false.

semihosting-ARM_SVCA32 SVC number for semihostingIntegeruint24_t0x123456
semihosting-Thumb_SVCT32 SVC number for semihostingIntegeruint8_t0xAB
semihosting-heap_basevirtual address of heap baseInteger0x00000000 - 0xFFFFFFFF0x0
semihosting-heap_limitvirtual address of top of heapInteger0x00000000 - 0xFFFFFFFF0x0F000000
semihosting-stack_basevirtual address of base of descending stackInteger0x00000000 - 0xFFFFFFFF0x10000000
semihosting-stack_limitvirtual address of stack limitInteger0x00000000 - 0xFFFFFFFF0x0F0000000

[a] Specifying false models enables modeling a different number of TLBs if this improves simulation performance. The simulation is architecturally accurate, but not device accurate. Architectural accuracy is almost always sufficient. Specify true if device accuracy is required.

[b] The value of argv[0] points to the first command line argument, not to the name of an image.

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