7.6.1. Ports

Table 7.8 provides a brief description of the EBCortexA9_SysRegs component ports. For more information, see the hardware documentation.

Table 7.11. EBCortexA9_SysRegs ports

NamePort ProtocolTypeDescription
reset_core[4]Signalmastersignals to reset separate processors
reset_outSignalmasterreset signal
sysreg_overridesEBSysRegsslaveport to communicate with EB_SysRegs
reset_inSignalslavereset signal

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