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Table 3.15 lists the ARM1176JZ-S™ core tile RTSM parameters that you can change when you start the model. All listed parameters are instantiation-time parameters except for num_interrupts, which is a run time parameter. This core tile RTSM is based on r0p4 of the ARM1176JZ-S processor.
The syntax to use in a configuration file is:
coretile.core. parameter=value
Table 3.15. ARM1176CT RTSM parameters
| Parameter | Description | Type | Values | Default |
|---|---|---|---|---|
| BIGENDINIT | Initialize to ARMv5 big endian mode. | boolean | true/false | false |
| CP15SDISABLE | Initialize to disable access to some CP15 registers. | boolean | true/false | false |
| INITRAM | Initialize with ITCM0 enabled at address 0x0. | boolean | true/false | false |
| UBITINIT | Initialize to ARMv6 unaligned behavior. | boolean | true/false | false |
| VINITHI | Initialize with high vectors enabled. | boolean | true/false | false |
| itcm0_size | Size of ITCM in KB. | integer | 0x00 - 0x40 | 0x10 |
| dtcm0_size | Size of DTCM in KB. | integer | 0x00 - 0x40 | 0x10 |
| semihosting-cmd_line | Command line available to semihosting SVC calls. | string | no limit except memory | [empty string] |
| semihosting-debug[1] | Enable debug output of semihosting SVC calls. | boolean | true/false | false |
| semihosting-enable | Enable semihosting SVC traps. | boolean | true/false | true |
| semihosting-ARM_SVC | ARM SVC number for semihosting. | integer | 24 bit integer | 0x123456 |
| semihosting-Thumb_SVC | Thumb SVC number for semihosting. | integer | 8 bit integer | 0xAB |
| semihosting-heap_base | Virtual address of heap base. | integer | 0x00000000 - 0xFFFFFFFF | 0x0 |
| semihosting-heap_limit | Virtual address of top of heap. | integer | 0x00000000 - 0xFFFFFFFF | 0x0F000000 |
| semihosting-stack_base | Virtual address of base of descending stack. | integer | 0x00000000 - 0xFFFFFFFF | 0x10000000 |
| semihosting-stack_limit | Virtual address of stack limit. | integer | 0x00000000 - 0xFFFFFFFF | 0x0F0000000 |
| vfp-enable_at_reset[2] | Enable coprocessor access and VFP at reset. | boolean | true/false | false |
| vfp-present | configure processor as VFP enabled[3] | boolean | true/false | true |
[1] Currently ignored. [2] This is model specific behavior with no hardware equivalent. [3] This parameter lets you disable the VFP features of the model. However the model has not been validated as a true ARM1176JZ-S processor. | ||||
The ARM1176 core tile RTSM also includes a GIC but this cannot be configured at instantiation time.
| Copyright © 2008 ARM Limited. All rights reserved. | ARM DUI0424B |
| Non-Confidential | Unrestricted Access |
| PDF version | |
| Home > Programmer’s Reference > Model configuration parameters > ARM1176CT RTSM parameters |