This glossary lists abbreviations used in this document or the Emulation Baseboard User Guide.

AACI

Advanced Audio CODEC Interface.

AHB™

Advanced High-performance Bus. The ARM open standard for on-chip buses.

AMBA^®

Advanced Microcontroller Bus Architecture.

APB

Advanced Peripheral Bus. The ARM open standard for peripheral buses. This design is optimized for low power and minimal interface complexity.

AXI™

Advanced eXtensible Interface. The ARM open standard for high-performance and high-frequency buses.

CADI

Cycle Accurate Debug Interface. A C++ API supporting interface capabilities for re-targetable, multi-core debug integration.

CLCD

Color Liquid-Crystal Display.

CODEC

COder DECoder for converting between analog and digital audio signals.

CXSM

Cycle approXimate System Model.

DOC

Disk-On-Chip. A non-volatile flash memory device with an interface that simplifies file accesses. Also called NAND flash referring to the logic gates used internally. The memory can only be accessed sequentially in blocks.

DMC

Dynamic Memory Controller.

DMA

Direct Memory Access.

DRAM

Dynamic Random Access Memory.

DSR

Data Set Ready, a UART flow-control signal.

DTR

Data Terminal Ready, a UART flow-control signal.

EB

RealView^® Emulation Baseboard. A hardware development platform that supports various Core Tiles and FPGA tiles.

GIC

Generic Interrupt Controller.

GPIO

General Purpose Input/Output.

Integrator^®/CP

Integrator Compact Platform.

I/O

Input/Output.

KMI

Keyboard/Mouse Interface.

LCD

Liquid Crystal Display.

LED

Light Emitting Diode.

MAC

Media Access Control. A layer in the Ethernet specification.

MCI

MultiMedia Card Interface.

MMC

MultiMedia Card.

NAND flash

Non-volatile memory. NAND refers to the type of logic gate used internally. See DOC.

NOR flash

Non-volatile memory. NOR refers to the type of logic gate used internally. Any memory address can be accessed randomly.

PCI

Peripheral Component Interconnect. A computer bus for attaching peripherals.

PHY

PHYsical layer. The layer in the Ethernet specification that describes the physical interface.

PISMO

Platform Independent Storage Module. Memory specification for plug in memory modules.

PLL

Phase-Locked Loop, a type of programmable oscillator.

RAM

Random Access Memory.

RTC

Real-Time Clock.

RTSM

Real-Time System Model.

RVD

RealView Debugger.

SRAM

Static Random Access Memory.

SCI

Smart Card Interface.

SD

Secure Digital memory card specification.

SMC

Static Memory Controller.

SSP

Synchronous Serial Port.

TCM

Tightly Coupled Memory. Memory present inside the test chip that typically runs at or near the processor speed.

UART

Universal Asynchronous Receiver/Transmitter.

USB

Universal Serial Bus.

VGA

Video Graphics Array.