RealView Development Suite Real-Time System Models User GuideVersion 4.1
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RealView® Development Suite Real-Time System Models User Guide

Version 4.1

Copyright © 2008-2010 ARM. All rights reserved.

Proprietary notices

Table of Contents

Preface
About this book
Intended audience
Using this book
Conventions
Additional reading
Feedback
Feedback on this product
Feedback on content
1. Introduction
1.1. Introduction to system models
1.2. Introduction to the EB RTSM
1.2.1. About the EB and Core Tile hardware
1.2.2. About the EB Real-Time System Models
1.3. Introduction to the MPS RTSM
1.3.1. About the MPS hardware
1.3.2. About the MPS RTSM
2. Getting Started with EB and MPS RTSMs
2.1. Getting started with RealView Debugger
2.1.1. Connecting to the RTSM in RealView Debugger
2.2. Getting started with ARM Profiler
2.3. Getting started with Model Shell
2.4. Configuring the RTSM
2.4.1. Using a configuration GUI in RealView Debugger
2.4.2. Setting model configuration options from Model Shell
2.5. Loading and running an application on the EB RTSM
2.5.1. Running the brot application in ARM Profiler
2.5.2. Running the brot application in RealView Debugger
2.6. Using the CLCD window
2.6.1. Using the EB CLCD window
2.6.2. Using the MPS Visualization window
2.7. Using Ethernet with an EB RTSM
2.7.1. Host requirements
2.7.2. Target requirements
2.7.3. Configuring Ethernet
2.8. Using a terminal with a system model
2.8.1. Telnet mode
2.8.2. Raw mode
2.9. Virtual filesystem
2.9.1. VFS operations
2.9.2. Using the VFS with a pre-built RTSM
3. Programmer’s Reference for the EB RTSMs
3.1. EB model memory map
3.2. EB model configuration parameters
3.2.1. EB RTSM baseboard parameters
3.2.2. Ethernet parameters
3.2.3. UART parameters
3.2.4. Terminal parameters
3.2.5. Visualization parameters
3.2.6. RTSM_EB_Cortex-A9_MPx1 and RTSM_EB_Cortex-A9_MPx2 core tile parameters
3.2.7. RTSM_EB_Cortex-A8 core tile parameters
3.2.8. RTSM_EB_Cortex-A5_MPx1 and RTSM_EB_Cortex-A5_MPx2 core tile parameters
3.2.9. RTSM_EB_Cortex-R4 core tile parameters
3.2.10. RTSM_EB_ARM1176 core tile parameters
3.2.11. RTSM_EB_ARM1136 core tile parameters
3.2.12. RTSM_EB_ARM926 core tile parameters
3.3. Differences between the EB and Core Tile hardware and the models
3.3.1. Features not present in the baseboard model
3.3.2. Restrictions on the processor models
3.3.3. Remapping and DRAM aliasing
3.3.4. Dynamic memory characteristics
3.3.5. Status and system control registers
3.3.6. Generic Interrupt Controller
3.3.7. GPIO2
3.3.8. Timing considerations
4. Programmer’s Reference for the MPS RTSMs
4.1. MPS model memory map
4.1.1. MPS registers
4.2. MPS configuration parameters
4.2.1. MPS visualization configuration parameters
4.2.2. DUT configuration parameters
4.2.3. Terminal parameters
4.2.4. Core Configuration Parameters
4.3. Differences between the MPS hardware and the system model
4.3.1. Features not present in the model
4.3.2. Timing considerations
Glossary

List of Figures

1.1. Block diagram of top-level EB model
1.2. ARM1176 Block diagram of Core Tile model
1.3. Block diagram of the EB Baseboard model
1.4. MPS RTSM block diagram
2.1. ARM Profiler Run dialog - Connection tab
2.2. ARM Profiler Run dialog - Profiling tab
2.3. ARM Profiler analysis
2.4. Breakpoint in brot.c
2.5. CLCD window at startup
2.6. CLCD window with Rate Limit off
2.7. Visualization window at startup
2.8. Visualization window with CLCD buffer displayed
2.9. Host transport block diagram
2.10. Pipe transport block diagram
2.11. Terminal block diagram

List of Tables

3.1. Memory map and interrupts for standard peripherals
3.2. EB Baseboard Model instantiation parameters
3.3. Default positions for EB System Model switch S6
3.4. STDIO redirection
3.5. EB System Model switch S8 settings
3.6. Ethernet instantiation parameters
3.7. UART instantiation parameters
3.8. Terminal instantiation parameters
3.9. Visualisation instantiation parameters
3.10. RTSM_EB_Cortex-A9_MPxn core tile parameters for the individual cores
3.11. RTSM_EB_Cortex-A8 core tile parameters
3.12. RTSM_EB_Cortex-A5_MPxn core tile parameters for the individual cores
3.13. RTSM_EB_Cortex-R4 core tile parameters
3.14. RTSM_EB_ARM1176 core tile parameters
3.15. RTSM_EB_ARM1136 core tile parameters
3.16. RTSM_EB_ARM926 core tile parameters
4.1. Overview of MPS memory map
4.2. MPS CPU system registers
4.3. MPS DUT system registers
4.4. MPS LCD registers
4.5. Memory configuration
4.6. User switches
4.7. Seven-segment register
4.8. Visualization parameters
4.9. DUT configuration parameters
4.10. Terminal instantiation parameters
4.11. Configuration parameters

Proprietary Notice

Words and logos marked with® or ™ are registered trademarks or trademarks owned by ARM, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners.

Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.

XVID Notice

THIS NOTICE IS FOR THE USE OF XVID. ARM IS ONLY DELIVERING XVID TO YOU FOR CONVENIENCE ON CONDITION THAT YOU ACCEPT THAT IT IS NOT LICENSED TO YOU BY ARM BUT THAT IT IS SUBJECT TO THE TERMS OF THE GNU GENERAL PUBLIC LICENSE VERSION 2 AND MAY BE SUBJECT TO OTHER PROPRIETARY LICENCES. YOU EXPRESSLY ASSUME ALL LIABILITIES AND RISKS WITH RESPECT TO YOUR USE AND DISTRIBUTION OF XVID.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision AAugust 2008Release for RealView Development Suite v4.0 Professional, System Generator v4.0 SP1.
Revision BDecember 2008Release for Fast Models 4.1. Added changes related to ARM_RTSM_PATH.
Revision CMarch 2009Release for Fast Models 4.2. Minor changes to text. Added description for device-accurate-tlb parameter.
Revision DNovember 2009Release for models provided by RealView Development Suite v4.0 Professional edition.
Revision EMay 2010Release for models provided by RealView Development Suite v4.1 Professional edition.
Revision F30 September 2010Release for models provided by RealView Development Suite v4.1 SP1 Professional edition.
Copyright © 2008-2010 ARM. All rights reserved.ARM DUI 0424F
Non-ConfidentialID052111
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