2.3.1. ARM CoreSight

The ARM1176JZF-S development chip includes ARM CoreSight technology. See CoreSight Technology System Design Guide (DGI 0012) for background information on the CoreSight components and interconnect.

Trace capture

The main components used for trace capture are:

CoreSight ETM11, ETB, TPIU and DAP
  • The CoreSight Embedded Trace Macrocell (ETM11) monitors the ARM core buses and outputs compressed information.

  • The Embedded Trace Buffer (ETB), buffers the information using 8KB of on chip RAM.

  • The Trace Port Interface Unit (TPIU) acts as a bridge between the on-chip trace data and the data stream that is captured by an external Trace Port Analyzer (TPA).

  • The Debug Access Port (DAP) provides a dedicated JTAG Debug Port (JTAG-DP) for the debug tools and provides access to the CoreSight Debug APB through an APB-Mux. The ETM11, ETB and TPIU are configured and accessed over the Debug APB bus.

Trace connector and adaptor board

The trace connectors enable you to connect a TPA to the PB1176JZF-S. The connector is a high-density AMP Mictor connector. The pinout for these connectors is provided in Test and debug connections.

The adaptor board buffers the high-speed signals between the Trace connectors and the Trace Port Analyzer.

Trace Port Analyzer

The TPA is an external device (such as RealView Trace) that connects to the trace connector (through the adaptor board) and stores information sent from the TPIU.

Debugger and Trace software

The debugger and trace software controls the JTAG unit, CoreSight ETM11, and TPA. The trace software reconstructs program flow from the information captured in the Trace Port Analyzer.


The trace and debug components must match the debugger you are using. ARM RealView Debugger (RVD) is a component of RealView Compilation Tools (RVCT) and supports RealView ICE and RealView Trace.

Always check with the manufacturer of the debug equipment what level of support is provided for CoreSight Technology.

System level debug

The CoreSight subsystem implemented in the ARM1176JZF-S development chip enables system level debug. The main CoreSight components are:

  • ARM11 CoreSight Embedded Trace Macrocell (CoreSight ETM11)

  • ARM11 Embedded Trace Buffer (ETB11) with 8KB memory

  • Trace Port Interface Unit (TPIU)

  • Debug Access Port (DAP)

  • Cross Trigger Interfaces (CTI)

  • Cross Trigger Matrix (CTM)

  • Synchronous ATB Bridge.

The CoreSight subsystem enables real-time system level debug and trace of the ARM1176JZF-S development chip and external components. The internal AMBA Trace Bus (ATB) is accessible at the device pins through a Synchronous 1:1 ATB Bridge. On the PB1176JZF-S, the ATB connects to the tile site HDRZ connector. This enables CoreSight system debug to be extended to the tile site when this is supported by an attached tile and debug software.

Debug modes

For system level debug, fit jumper J1, (DAP ENABLE) on the PB1176JZF-S. This connects the DAP JTAG Debug Port (JTAG-DP) to the PB1176JZF-S JTAG debug scan-chain.


There is no JTAG connection to the CoreSight ETM11. Trace is only supported when using the DAP.

For legacy debug of the ARM1176JZF-S, remove jumper J1, (DAP ENABLE) on the PB1176JZF-S. This bypasses the DAP and connects the PB1176JZF-S JTAG debug scan-chain directly to the DBGTAP port on the ARM1176JZF-S.

Copyright © 2007-2011 ARM Limited. All rights reserved.ARM DUI 0425F