The Ethernet interface is implemented with a SMC LAN9118 10/100 Ethernet single-chip MAC and PHY. The device is attached to the static memory bus from the development chip.

The isolating RJ45 connector incorporates two network status LEDs. The function of the LEDs can be set to indicate link, activity, transmit, receive, full duplex, or 10/100 selection. See the data sheet for the LAN9118 for more details on programming the registers.

The SMCS LAN9118 is a fast Ethernet controller that incorporates a Media ACcess (MAC) Layer, a PHYsical (PHY) layer, and an 8KB dynamically configurable transmit and receive FIFO.

The controller supports dual-speed 100Mbps or 10Mbps and auto configuration. When auto configuration is enabled, the chip is automatically configured for network speed and for full or half-duplex operation.

The controller connects to the ARM1176JZF-S development chip SMC using CS6, which is shared with the USB port.

The LAN9118 is a little-endian device. The default configuration for the system bus is also little-endian.

A serial EEPROM provides the following parameters to the LAN9118 at reset:

When the PB1176JZF-S is manufactured, an ARM value for the Ethernet MAC address and the register base address are loaded into the EEPROM. A unique MAC address is programmed at manufacture, but the address can be reprogrammed if required. Reprogramming of the EEPROM is done through LAN9118 Bank 1 (general and control registers).