7.2. Flash-FPGA load and code space considerations

The Altera Cyclone III Starter Board holds the default FPGA power-on image in the lower half of flash. If you want to use the onboard flash for storage, it is recommended that you use the upper part of flash.

All of flash is available to you in the example design, but you can easily restrict your software project to use only the upper portion of flash. In RealView MDK you can configure the valid address range in the Target tab of the project options window to be the upper portion of flash, or you can create a custom scatter file. Alternatively, you can protect the lower area of flash by modifying the address assignment in the top-level Verilog file, for example:

//assign tristate_bridge_address[23:1] = tristate_bridge_address_internal[23:1];
 assign tristate_bridge_address[23:1] = {1'b1, tristate_bridge_address_internal[22:1]};

This does not affect the SRAM address, because the SRAM is sixteen times smaller and does not use the upper address bits. This change effectively cuts the size of the flash to 8MB.

If you want your design to be initialized from flash memory when the board is powered on, instead of using the Quartus II programmer each time, see Application Note 214: Flash programming in the ARM Cortex-M1 FPGA Development Kit. This Application Note also shows how to initialize software code into the flash.

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