4.5.1. CT-R4F ID register
The CT_R4F_ID register provides information that identifies
the revision status of the CT-R4F Core Tile.
Note
This information will be useful if you need to contact ARM
Support for assistance.
The CT_R4F_ID register is at serial stream address 0x1000.
Figure 4.11 shows the bit
allocations within the CT_R4F_ID register.
Table 4.22 shows
the bit assignments within the register.
Table 4.22. CT_R4F_ID register bit assignments
| Bits | Access | Name | Value | Description |
|---|
| [31:24] | Read only | PROC_ID | 0x11 | Processor ID
(ARM Cortex-R4F) |
| [23:18] | Read only | − | − | Reserved |
| [17:15] | Read only | PROC_IMEMSIZE | b100 | Processor Instruction Cache size (16KB) |
| [14:12] | Read only | PROC_DMEMSIZE | b100 | Processor Data
Cache size (16KB) |
| [11] | Read only | − | − | Reserved |
| [10:8] | Read only | CT_PCB_REV | b010 | CT-R4F board revision |
| [7:0] | Read only | CT_PLD_VER | 0x01 | CT-R4F PLD version |
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