3.10.1. JTAG debug scan chain routing

In JTAG debug (normal) mode only the ARM Cortex-R4F test chip DAP is connected in the debug scan chain. JTAG debug mode routing is selected when nCFGEN is HIGH. This is the default baseboard setting.

Note

Serial Wire Debug (SWD) is also supported on the CT-R4F at the Trace A connector. See CoreSight Serial Wire Debug for details.

Copyright © 2009-2011 ARM Limited. All rights reserved.ARM DUI 0441C
Non-ConfidentialID021412