About the configuration database import utility

The import utility, cdbimporter, aims to provide an easy method to import platform information into DS-5, and so provide limited debug and trace support for the platform through RVI/DSTREAM or model connections.

A target database holds the platform information for the DS-5. The import utility creates a new platform entry in a target database using information from:

ARM® recommends that you build new platform entries in a fresh directory to produce a new target database. This is because the DS-5 target database might install in a read-only location and when DS-5 updates, any changes to the DS-5 target database are lost. You can specify multiple target databases in DS-5 using the Preferences dialog. This enables platforms in the new database to use existing processor and register definitions.

Note

DS-5 is not yet capable of creating RVI/DSTREAM configuration files from within Eclipse, the Debug Hardware Configuration utitlity is currently the only method of doing this.

The import utility creates the following debug operations:

The import utility does not create:

For SMP, duplicate debug operations are produced for synchronisation with or without using CTI devices. Using CTIs produces a much tighter synchronization with a very low latency in order of cycles but the CTIs must be fully implemented and connected in line with the ARM reference designs, and must not be used for any other purpose. Synchronization without using CTIs has a much higher latency, but makes no assumptions about implementation or usage.

You might have to manually configure off-chip TPIU trace for multiplexed pins and also perform calibrations to cope with signal timing issues.

If you experience any problems or need to produce other configurations, contact your support representative.

Show/hideAssumptions

The import utility makes the following assumptions when creating debug operations:

  • There is a linear mapping between trace macrocells and CoreSight™ trace funnel ports.

  • The Embedded Trace Macrocell (ETM)/Program Trace Macrocell (PTM) versions are fixed for each type of processor.

    Table 1. ETM/PTM versions for each type of processor

    Processor TypeETM/PTM
    Cortex-A15PTM
    Cortex-A7ETMv3.5
    Cortex-A8ETMv3.3
    Cortex-A9PTM
    Cortex-R4ETMv3.3
    Cortex-R5ETMv3.3
    Cortex-R7ETMv3.3
    Cortex-M3ETMv3.4
    Cortex-M4ETMv3.4
    ARM9 seriesETMv1.x is not supported.
    ARM11 seriesETMv3.1

  • The CTI devices are not used for other operations.

  • In a target containing multiple CoreSight ETBs, TPIUs or trace funnels, the import utility produces configuration for the first example of each trace funnel, ETB, and TPIU with the lowest base address.

Show/hideLimitations

It is only possible to import platforms that can be auto-configured using the Debug Hardware Configuration utitlity or from a model.

DS-5 supports only a certain number of processors. To see a list of the supported processors, run the import utility using the --list-cores option (-l).

The import utility produces a basic configuration with appropriate processor and CP15 register sets but this might not always be perfect. For example, showing TrustZone® registers on all Cortex-A9 processors is not always appropriate, and NEON registers are never shown for an imported platform.

Show/hideSee also

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