Handling processor exceptions

ARM processors handle exceptional events by jumping to one of a set of fixed addresses known as exception vectors. Except for a Supervisor Call (SVC), these events are not part of normal program flow and can happen unexpectedly because of a software bug. For this reason most ARM processors include a vector catch feature to trap these exceptions. This is most useful for bare-metal projects, or projects at an early stage of development. When an OS is running it might use these exceptions for legitimate purposes, for example virtual memory.

When vector catch is enabled, the effect is similar to placing a breakpoint on the selected vector table entry, except that vector catches use dedicated hardware in the processor and do not use up valuable breakpoint resources. To manage vector catch in the debugger either select Manage Signals from the Breakpoints view menu or use the handle command. You can also use the info signals command to display the current handler settings.

The vector catch events that are available are dependent on the exact processor that you are connected to.

Figure 38. Manage exception handler settings

Manage exception handler settings

Show/hideExample

If you want the debugger to catch the exception, log the event, and stop the application when the exception occurs then you must enable stopping on an exception. In the following example, a NON-SECURE_FIQ exception occurs causing the debugger to stop and print a message. You can then step or run to the handler, if present.

Example 5. Debugging an exception handler

handle NON-SECURE_FIQ stop        # Enable stop and print on a NON-SECURE_FIQ exception

If you want the exception to invoke the handler without stopping then you must disable stopping on an exception.

Example 6. Ignoring an exception

handle NON-SECURE_FIQ nostop      # Disable stop on a NON-SECURE_FIQ exception

Show/hideSee also

Copyright © 2010-2012 ARM. All rights reserved.ARM DUI 0446L
Non-ConfidentialID100912