4.5 Target configuration editor - Registers tab

A tabular view that enables you to define memory mapped registers for your target. Each register is named and typed and can be subdivided into bit fields (any number of bits) which act as subregisters.

Unique Name

Name of the register (mandatory).

Name

User-friendly name for the register.

Base Address

Absolute address or the Name of the memory region to use as a base address. The default is an absolute starting address of 0x0.

Offset

Offset that is added to the base address (mandatory).

Size

Size of the register in bytes (mandatory).

Access size

Access width of the register in bytes.

Access

Access mode for the selected register.

Description

Detailed description of the register.

Peripheral

Associated peripheral, if applicable.

The Bitfield button opens a table displaying the following information:

Unique Name

Name of the selected bitfield (mandatory).

Name

User-friendly name for the selected bitfield.

Low Bit

Zero indexed low bit number for the selected bitfield (mandatory).

High Bit

Zero indexed high bit number for the selected bitfield (mandatory).

Access

Access mode for the selected bitfield.

Description

Detailed description of the selected bitfield.

Enumeration

Associated enumeration for the selected bitfield, if applicable.

Figure 4-5 Target configuration editor - Registers tab
Target configuration editor - Registers tab


Mandatory fields are indicated by an asterisk. Toolbar buttons and error messages are displayed in the header panel as appropriate.

Non-ConfidentialPDF file icon PDF versionARM DUI0446Z
Copyright © 2010-2016 ARM Limited or its affiliates. All rights reserved.