|Non-Confidential||PDF version||ARM DUI0446Z|
|Home > Controlling Target Execution > Handling processor exceptions|
ARM® processors handle exceptions by jumping to one of a set of fixed addresses known as exception vectors.
Except for a Supervisor Call (SVC) or Secure Monitor Call (SMC), these events are not part of normal program flow. The events can happen unexpectedly, perhaps because of a software bug. For this reason, most ARM processors include a vector catch feature to trap these exceptions. This is most useful for bare-metal projects, or projects at an early stage of development. When an OS is running, it might use these exceptions for legitimate purposes, for example virtual memory handling.
When vector catch is enabled, the effect is similar to placing a breakpoint on the selected vector table entry. But in this case, vector catches use dedicated hardware in the processor and do not use up valuable breakpoint resources.
To manage vector catch in the debugger, either:
Select Manage Signals from the Breakpoints toolbar or the view menu to display the Manage Signals dialog box.
For each individual signal that you want information, select either the Stop or Print option. The Stop option stops the execution and prints a message. The Print option prints a message, but continues execution. You can view these messages in the Commands view.
Use the handle command and view the results in the Command view.
NON-SECURE_FIQexception occurs causing the debugger to stop and print a message in the Commands view. You can then step or run to the handler, if present.
handle NON-SECURE_FIQ stop # Enable stop and print on a NON-SECURE_FIQ exception
handle NON-SECURE_FIQ nostop # Disable stop on a NON-SECURE_FIQ exception