15.5.7 Physical memory access via CoreSight

Although CoreSight does not require it, most CoreSight implementations provide a direct way to access the bus or buses of the target system. They do this by providing a Memory Access Port (MEM-AP) which is accessed through the CoreSight DAP. There are several types of MEM-AP depending on the type of the system bus. The three main types are APB-AP, AHB-AP, and AXI-AP, which provide access to APB, AHB, and AXI bus types respectively. Each of these access ports implements the CoreSight MEM-AP interface.

The following figure shows a simple, but typical, arrangement of MEM-APs:

Figure 15-8 MEM-AP Access Ports
MEM-AP Access Ports

To allow direct memory access through one of the MEM-APs, a DTSL configuration can create device objects for the MEM-APs themselves. When the memory access methods are called on such devices, the memory access is directed straight onto the system bus, completely bypassing the core or cores.


The memory access is not processed by the core MMU (so there is no core MMU address translation), and bypasses any cache in the core, which might result in a different value being observed to that observed by the core.
Non-ConfidentialPDF file icon PDF versionARM DUI0446Z
Copyright © 2010-2016 ARM Limited or its affiliates. All rights reserved.