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The following System configuration registers, SYS_CF, exist:
SYS_CFGDATA.
SYS_CFGCTRL.
SYS_CFGSTAT.
The registers are collectively referred to as SYS_CFG registers.
The registers enable communication between the MCC and Daughterboard Configuration Controller to read and write a variety of system parameters, for example:
Oscillators.
Voltage.
Current.
Power.
To complete a CFG transfer in your application code, implement the following pseudo code:
Clear the SYS_CFGSTAT Complete bit.
For writes, set the SYS_CFGDATA value with your
data value. For example, to set an oscillator to 50MHz, write 50000000 to
this register.
Set the SYS_CFGCTRL register with the correct function
and destination value. For example, to read from the Motherboard
oscillator 1, set the SYS_CFGCTRL register to 0x80100001:
Start = 1
Write = 1
DCC = 0
Function = 1 (OSC)
Site = 0 (MB)
Position = 0
Device = 1, oscillator 1.
Wait for the SYS_CFGSTAT Complete bit to be set to indicate that the read or write transfer has completed.
For reads, you must read the SYS_CFGDATA register to read the returned data.
The SYS_CFGDATA Register characteristics are:
Holds the data value to be written or read during communication across the SPI interface between the MCC and a Daughterboard Configuration Controller.
There are no usage constraints.
Available in all configurations.
See Table 4.3.
Table 4.17 shows the register bit assignments.
Table 4.17. SYS_CFGDATA Register bit assignments
| Bits | Name | Description |
|---|---|---|
| [31:0] | CFG data | 32-bit configuration data register |
The same interface is accessible from the MCC command line. See Versatile Express Configuration Technical Reference Manual CFG command.
The SYS_CFGCTRL Register characteristics are:
Controls the transfer of data across the SPI interface between the MCC and a Daughterboard Configuration Controller.
See Table 4.18 and Table 4.19.
Available in all configurations.
See Table 4.3.
Figure 4.13 shows the register bit assignments.
Table 4.18 shows the register bit assignments.
Table 4.18. SYS_CFGCTRL Register bit assignments
| Bits | Name | Description |
|---|---|---|
| [31] | Start | Initiates the transfer. |
| [30] | Write | Read or write data:
|
| [29:26] | DCC | Daughterboard Configuration Controllers. This is a 4-bit number for the particular Daughterboard Configuration Controller on a board to access. Examples are:
|
| [25:20] | Function | 6-bit value that describes the function of the device being written to. See SYS_CFGCTRL function values. |
| [19:18] | - | Undefined. |
| [17:16] | Site | Describes the board site location of the device written to:
|
| [15:12] | Position | Describes the board stack position: 4-bit number for the position of the daughterboard in the stack 0-15 on a particular site. 0 represents the bottom of the stack. Set to 0 for the motherboard. |
| [11:0] | Device | 12-bit number that describes the device number. For example, oscillator 1 would be device 1. |
Table 4.19 shows the different function values with their range of data values that the SYS_CFGDATA represents.
Table 4.19. SYS_CFGCTRL function values
| Value | Name | Format | Range | Function |
|---|---|---|---|---|
| 1 | SYS_CFG_OSC | Frequency, Hz | 1Hz-4.3GHz | Oscillator value |
| 2 | SYS_CFG_VOLT | Voltage, µV | 1µV-4.3kV | Voltage value |
| 3 | SYS_CFG_AMP | Current, µA | 1µA-4.3kA | Current value |
| 4 | SYS_CFG_TEMP | Temperature, µC | 1µC-4.3kC | Temperature value |
| 5 | SYS_CFG_RESET | - | - | DB reset register |
| 6 | SYS_CFG_SCC | 32-bit register value | 32-bit value | SCC configuration register |
| 7 | SYS_CFG_MUXFPGA | 2-bit board value to select as the DVI source for the Multiplexer FPGA. | MB/DB1/DB2 | Multiplexer FPGA select:
|
| 8 | SYS_CFG_SHUTDOWN | - | - | Shutdown system |
| 9 | SYS_CFG_REBOOT | - | - | Reboot system |
| 10 | - | - | - | Reserved |
| 11 | SYS_CFG_DVIMODE | 3-bit DVI mode value | VGA-UXGA |
|
| 12 | SYS_CFG_POWER | Power, µW | 1µW-4.3kW | Power value |
| 13 | SYS_CFG_ENERGY | Energy, µJ | 1µJ-2^64µJ | On-board energy meter |
The SYS_CFGSTAT Register characteristics are:
Describes if the transfer between the MCC and a Daughterboard Configuration Controller completes, or if there is an error during the transfer.
There are no usage constraints.
Available in all configurations.
See Table 4.3.
Figure 4.14 shows the register bit assignments.
Table 4.20 shows the register bit assignments.
Table 4.20. SYS_CFGSTAT Register bit assignments
| Bits | Name | Description |
|---|---|---|
| [31:2] | − | Undefined |
| [1] | Error | 1: configuration error. This bit is cleared when bit S of SYS_CFGCTRL is set. |
| [0] | Complete | 1: configuration complete. This bit is cleared when bit S of SYS_CFGCTRL is set. |
Example 4.1 shows pseudo code for changing the SYS_CFG registers.
Example 4.1. Pseudo code for changing the SYS_CFG registers
Sys_cfg ( write, function, site, position, dcc, device, data)
// check if busy
if (SYS_CFGCTRL & SYS_CFG_START)
return FAILURE
// clear the complete bit in the SYS_CFGSTAT status register
SYS_CFGSTAT = 0
if (write)
// write data
SYS_CFGDATA = data
// set control register
SYS_CFGCTRL = SYS_CFG_START | SYS_CFG_WRITE | dcc | function | site | position | device
// wait for complete flag to be set while (!(SYS_CFGSTAT & SYS_CFG_COMPLETE)
// check error status and return error flag if set
if (SYS_CFGSTAT & SYS_CFG_ERROR) return FAILURE
else // set control register
SYS_CFGCTRL = SYS_CFG_START | dcc | function | site | position | device
// wait for complete flag to be set
while (!(SYS_CFGSTAT & SYS_CFG_COMPLETE))
// check error status flag and return error flag if set
if (SYS_CFGSTAT & SYS_CFG_ERROR)
return FAILURE
else // read data data = SYS_CFGDATA
return SUCCESS
| Copyright © 2009-2013, ARM. All rights reserved. | ARM DUI 0447H |
| Non-Confidential | ID040613 |
| PDF version | |
| Home > Programmers Model > Register descriptions > System Configuration registers |