ARM® Motherboard Express µATX Technical Reference Manual

V2M-P1


Table of Contents

Preface
About this book
Product revision status
Intended audience
Using this book
Glossary
Typographical Conventions
Additional reading
Feedback
Feedback on this product
Feedback on content
1. Introduction
1.1. About the Motherboard Express µATX
1.1.1. Back panel connectors
1.2. Precautions
1.2.1. Ensuring safety
1.2.2. Preventing damage
2. Hardware Description
2.1. Motherboard architecture and buses
2.1.1. Motherboard buses
2.2. Power up, on/off and reset signals
2.2.1. Power up reset
2.2.2. ON/OFF/Soft Reset push button briefly pressed
2.2.3. Hardware RESET push button
2.2.4. External reset requests from the daughterboards
2.3. Clock architecture
2.4. Power
2.5. Peripherals and interfaces on the motherboard
2.5.1. IO FPGA peripherals
2.5.2. Ethernet
2.5.3. USB
2.5.4. DVI multiplexer
2.5.5. PCI-Express
2.6. Interrupt signals
2.7. DMA signals
2.8. JTAG and test connectors
3. Configuration
3.1. Configuration environment
4. Programmers Model
4.1. About this programmers model
4.2. Memory maps
4.2.1. ARM Legacy memory map
4.2.2. ARM Cortex-A Series memory map
4.3. Register summary
4.4. Register descriptions
4.4.1. ID Register
4.4.2. User Switch Register
4.4.3. LED Register
4.4.4. 100Hz Counter Register
4.4.5. Flag Registers
4.4.6. MCI Register
4.4.7. Flash Control Register
4.4.8. Config Switch Register
4.4.9. 24MHz Counter Register
4.4.10. Miscellaneous Flags Register
4.4.11. DMA Channel Selection Register
4.4.12. SYS_ PROCID0 Register
4.4.13. SYS_PRODCID1 Register
4.4.14. System Configuration registers
4.5. IO Peripherals and interfaces
4.5.1. Advanced Audio CODEC Interface
4.5.2. Color LCD Controller
4.5.3. Compact Flash interface
4.5.4. Ethernet
4.5.5. Keyboard and Mouse Interface, KMI
4.5.6. MultiMedia Card Interface, MCI
4.5.7. Real Time Clock, RTC
4.5.8. Two-wire serial bus interface, SBCon
4.5.9. Timers
4.5.10. UART
4.5.11. USB interface
4.5.12. Watchdog
A. Signal Descriptions
A.1. Audio CODEC interface
A.2. UART interface
B. Specifications
B.1. Timing specifications
B.1.1. SMB synchronous read
B.1.2. SMB synchronous write
B.1.3. SMB asynchronous read
B.1.4. SMB asynchronous write
B.1.5. Video multiplexer FPGA timing
B.2. Electrical Specification
B.2.1. Power supply loading
C. Revisions

List of Tables

2.1. Motherboard clocks
2.2. Interrupt signals
4.1. Motherboard peripheral ARM legacy memory map
4.2. Motherboard peripheral ARM Cortex-A Series memory map
4.3. Register map for status and system registers
4.4. SYS_ID Register bit assignments
4.5. SYS_SW Register bit assignments
4.6. SYS_LED Register bit assignments
4.7. SYS_100HZ Register bit assignments
4.8. Flag registers
4.9. SYS_MCI Register bit assignments
4.10. SYS_FLASH Register bit assignments
4.11. SYS_CFGSW Register bit assignments
4.12. SYS_24MHz Register bit assignments
4.13. SYS_MISC Register bit assignment
4.14. SYS_DMA Register bit assignments
4.15. SYS_PROCID0 Register bit assignments
4.16. SYS_PROCID1 Register bit assignments
4.17. SYS_CFGDATA Register bit assignments
4.18. SYS_CFGCTRL Register bit assignments
4.19. SYS_CFGCTRL function values
4.20. SYS_CFGSTAT Register bit assignments
4.21. AACI implementation
4.22. Modified AACI PeriphID3 Register bit assignments
4.23. CLCDC implementation
4.24. CompactFlash implementation
4.25. CF_CTRL Register bit assignments
4.26. Ethernet implementation
4.27. KMI implementation
4.28. MCI implementation
4.29. RTC implementation
4.30. Serial bus implementation
4.31. Serial interface device addresses
4.32. SBCon 0 serial bus register
4.33. SBCon 1 serial bus register
4.34. Timer implementation
4.35. UART implementation
4.36. USB implementation
4.37. USB controller base address
4.38. Watchdog implementation
A.1. Serial plug signal assignment
B.1. Motherboard electrical characteristics
B.2. Daughterboard electrical characteristics
C.1. Issue A
C.2. Differences between Issue A and Issue B
C.3. Differences between Issue B and Issue C
C.4. Differences between Issue C and Issue D
C.5. Differences between Issue D and Issue E
C.6. Differences between Issue E and Issue F
C.7. Differences between Issue F and Issue G
C.8. Differences between Issue G and Issue H
C.9. Differences between Issue H and Issue I
C.10. Differences between Issue I and Issue J

Proprietary Notice

Words and logos marked with ® or ™ are registered trademarks or trademarks of ARM in the EU and other countries, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners.

Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder.

The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.

This document is intended only to assist the reader in the use of the product. ARM shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.

Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.

Confidentiality Status

This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to.

Product Status

The information in this document is final, that is for a developed product.

Conformance Notices

This section contains conformance notices.

Federal Communications Commission Notice

This device is test equipment and consequently is exempt from part 15 of the FCC Rules under section 15.103 (c).

CE Declaration of Conformity

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

The system should be powered down when not in use.

The Motherboard Express µATX generates, uses, and can radiate radio frequency energy and may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment causes harmful interference to radio or television reception, which can be determined by turning the equipment off or on, you are encouraged to try to correct the interference by one or more of the following measures:

  • ensure attached cables do not lie across the card

  • reorient the receiving antenna

  • increase the distance between the equipment and the receiver

  • connect the equipment into an outlet on a circuit different from that to which the receiver is connected

  • consult the dealer or an experienced radio/TV technician for help.

Note

It is recommended that wherever possible shielded interface cables be used.

Revision History
Revision A27 November 2009First release for V2M-P1
Revision B26 March 2010Second release for V2M-P1
Revision C27 August 2010Third release for V2M-P1
Revision D15 October 2010Fourth release for V2M-P1
Revision E28 March 2011Fifth release for V2M-P1
Revision F22 June 2012Sixth release for V2M-P1
Revision G12 October 2012Seventh release for V2M-P1
Revision H31 March 2013Eighth release for V2M-P1
Revision I12 August 2013Ninth release for V2M-P1
Revision J26 May 2014Tenth release for V2M-P1
Copyright © 2009-2014, ARM. All rights reserved.ARM DUI 0447J
Non-ConfidentialID052914