memory

This command defines a memory region.

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memory start_address { end_address | +size} [attributes]...

Where:

start_address

Specifies the start address for the region.

end_address

Specifies the inclusive end address for the region. You can use 0x0 as a shortcut to represent the end of the address space.

size

Specifies the size of the region.

attributes

Specifies additional attributes:

access_mode

Specifies the access mode for the region:

na

no access

ro

read-only

wo

write-only

rw

read/write. This is the default.

width

Specifies the access width:

8

8-bit

16

16-bit

32

32-bit

64

64-bit.

It is only necessary to specify a specific access width where the memory region is sensitive to this, for example, when accessing some peripherals.

If no width is specified then the debugger uses any available access width and generally provides the highest performance.

bp | nobp

Controls whether or not software breakpoints can be set in the region. bp is the default.

hbp | nohbp

Controls whether or not hardware breakpoints can be set in the region. hbp is the default.

cache | nocache

Controls whether the debugger can cache data read from the memory region. Enabling the caching of memory can improve debugger performance. Memory regions that can be modified by external sources should not be cached by the debugger. For example volatile peripherals.

nocache is the default.

verify | noverify

Controls whether or not a write operation must verify the value written by reading the value back and comparing it to the value written. The verify option also requires the rw attribute to be specified so that the verify operation to be performed. ARM recommends that you mark areas of memory containing peripherals as noverify, because some peripheral registers are volatile such that reading their value changes their contents as a side-effect.

verify is the default.

Show/hideExample

Example 74. memory

memory 0x1000 0x2FFF cache     # specify RW region 0x1000-0x2FFF (cache)
memory 0x3000 0x7FFF ro 8      # specify 8-bit RO region 0x3000-0x7FFF (nocache)
memory 0x8000 0x0              # specify RW region 0x8000-0xFFFF (nocache)

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Copyright © 2010-2012 ARM. All rights reserved.ARM DUI 0452J
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