DCC communication between target and host debug tools

The target accesses the DCC as coprocessor 14 on the processor using the ARM instructions MCR and MRC. The following figure shows three DCC registers to control and transfer data between the target and host debug tools.

Read register

For the target to read data sent from the host debug tools.

Write register

For the target to write messages to the host debug tools.

Control register

To provide handshaking information for the target and the host debug tools.

For pre-ARMv6 processors:

Bit 1 (W bit)

Clear when the target can send data.

Bit 0 (R bit)

Set when there is data for the target to read.

For ARMv6 and later processors:

Bit 29 (W bit)

Clear when the target can send data.

Bit 30 (R bit)

Set when there is data for the target to read.

Figure 15. DCC communication between target and host debug tools

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Other information
  • The Technical Reference Manual for your processor.

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