1.1 About the ARM architectures

The ARM architecture defines the ARM and Thumb® instruction sets, execution models, memory models and debug models used by ARM processors.

Variants of the memory models might include virtual memory, caches, Tightly Coupled Memory (TCM), and memory protection. ARM architecture extensions define additional features such as floating-point support, Single Instruction Multiple Data (SIMD) instructions, security extensions, Java bytecode acceleration, and multiprocessing support.

The ARM architecture is constantly evolving to meet the increasing demands of leading edge applications developers, while retaining the backwards compatibility necessary to protect investment in software development. For more information, see the Technical Reference Manual for your processor.

The following table shows some key features for some of the ARM processors supported by ARM Compiler.

Table 1-1 Key features

Processor Architecture Tightly Coupled Memory Memory Management Thumb-2 technology
ARM7TDMI® ARMv4T - - -
ARM920T™ ARMv4T - MMU -
ARM922T™ ARMv4T - MMU -
ARM926EJ-S™ ARMv5TEJ Yes MMU -
ARM946E-S™ ARMv5TE Yes MPU -
ARM966E-S™ ARMv5TE Yes - -
ARM1136J-S™/ARM1136JF-S™ ARMv6K Yes MMU -
ARM1156T2-S™ ARMv6T2 Yes MPU Yes
ARM1176JZ-S™/ARM1176JZF-S™ ARMv6Z Yes MMU -
ARM11™ MPCore™ ARMv6K - MMU -
Cortex™-M0 ARMv6-M - - Yesa
Cortex-M0+ ARMv6-M - MPU (optional) Yesa
Cortex-M1 ARMv6-M Yes - Yesa
Cortex-M3 ARMv7-M - MPU (optional) Yes, but without ARM instruction set
Cortex-M4 ARMv7E-M - MPU (optional) Yes, but without ARM instruction set
Cortex-M7 ARMv7E-M Yes MPU (optional) Yes, but without ARM instruction set
Cortex-A5 ARMv7-A - MMU Yes
Cortex-A7 ARMv7-A - MMU Yes
Cortex-A8 ARMv7-A - MMU Yes
Cortex-A9 ARMv7-A - MMU Yes
Cortex-A15 ARMv7-A - MMU Yes
Cortex-A17 ARMv7-A - MMU Yes
Cortex-R4, Cortex-R4F, Cortex-R7, and Cortex-R8 ARMv7-R Yes MPU Yes
a 

ARMv6-M supports a small number of the 32-bit instructions introduced in ARMv6T2.

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