1.12 ARM architecture v7-A

ARMv7-A is a variant of the ARMv7 architecture targeted at the application profile.

The following table shows useful command-line options.

Table 1-7 Useful command-line options for ARMv7-A

Command-line option Description
--cpu=7 ARMv7 with Thumb instructions only (no ARM instructions), and without hardware dividea
--cpu=7-A ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb, and ThumbEE instructions, NEON™ support, and 32-bit SIMD support
--cpu=name

Where name is a specific ARM processor. For example:

  • Cortex-A8 for ARMv7 with ARM and Thumb instructions, hardware VFP, NEON support, and 32-bit SIMD support.

Key features

Key features for ARMv7-A:

  • Supports the advanced SIMD extensions.

  • Supports the Thumb Execution Environment (ThumbEE).

Alignment support

The data alignment behavior supported by the ARM architecture is significantly different between ARMv4 and ARMv7. An ARMv7 implementation must support unaligned data accesses. You can control the alignment requirements of load and store instructions by using the A bit in the CP15 register c1.

Note:

ARMv7 architectures do not support pre-ARMv6 alignment.

Endian support

You can produce either little-endian or big-endian code using the compiler command-line options --littleend and --bigend respectively.

ARMv7-A supports the following endian modes:

LE

little-endian format

BE-8

big-endian format used by ARMv6 and ARMv7.

ARMv7 does not support the legacy BE-32 mode. If you have legacy code for ARMv7 processors that contain instructions with a big-endian byte order, then you must perform byte order reversal.

a

ARM v7 is not a recognized ARM architecture. Rather, it denotes the features that are common to all of the ARMv7-A, ARMv7-R, and ARMv7-M architectures.

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