A.1 Revisions for Software Development Guide

The following technical changes have been made to the Software Development Guide.

Table A-1 Differences between issue L and issue M

Change

Topics affected

Added Cortex-R8 to the table of key features for the current ARM processors.

1.1 About the ARM architectures

Enhanced the topic about which processors support bit-banding.

1.14 ARM architecture v7-M

Clarified that byte-order reversal is an implementation option.

1.13 ARM architecture v7-R

Removed redundant information from the topic.

2.2 Default compilation tool behavior

Clarified the input section attributes RO, RW, and ZI.

2.4 Default memory map

Enhanced the topic about writing exception handlers entirely in Thumb code.

5.2 Exception handling process

Clarified the architectures that support Thumb code for inline assembly.

3.1 Instruction intrinsics, inline and embedded assembler

Removed the sentence about switching to system mode for privileged access.

5.12 Reentrant interrupt handlers

Clarified the note about fetching instructions from 0xFFFF0000.

2.15 ROM and RAM remapping

Clarified the processors that support bit-banding.

2.12 Scatter file with link to bit-band objects

Enhanced the topic and figure to show target-dependent C library functions.

2.6 Tailoring the C library to your target hardware

Enhanced the __attribute__((zero_init)) example.

2.20 Target hardware and the memory map

Clarified that the ARMv6-M architecture only has a limited set of 32-bit Thumb instructions.

1.6 Thumb-2 technology

Added link to Cortex-M3 Embedded Software Development.

2.17 Stack pointer initialization

Added link to ARM Compiler C Library Startup and Initialization.

2.5 Application startup

Table A-2 Differences between issue K and issue L

Change

Topics affected

Added ARM Compiler product name to pages where it was missing.

Table A-3 Differences between issue J and issue K

Change

Topics affected

Re-organized the topics about floating-point build options, and corrected the description of floating-point build options in ARMv7 and later.

Improved the description of the example.

4.5 Pointers to functions in Thumb state

Removed a statement that implied that ARMv7 does not use the SVC instruction.

7.1 What is semihosting?

Corrected the description of how to control alignment checking in ARMv7-M. 1.14 ARM architecture v7-M
Removed topic Using two versions of the same function. Support for this feature was removed in ARM Compiler v4.1.

Table A-4 Differences between issue I and issue J

Change

Topics affected

Added a topic describing execute-only memory.

2.21 Execute-only memory

Added a topic describing how to build an application with code in execute-only memory.

2.22 Building applications for execute-only memory

Table A-5 Differences between issue H and issue I

Change Topics affected
Where appropriate, changed the terminology that implied that 16-bit Thumb and 32-bit Thumb are separate instruction sets. Various topics
Where appropriate, changed the term processor state to instruction set state. Various topics
Added Cortex-M0+ to the table of key features for the current ARM processors. 1.1 About the ARM architectures
Added topic to describe the ARM architecture profiles. 1.7 ARM architecture profiles
Moved the definitions of the ARM architecture profiles to the new topic.

Table A-6 Differences between issue G and issue H

Change Topics affected
Added Cortex-M0+ to the table of key features for the current ARM processors. 1.1 About the ARM architectures

Table A-7 Differences between issue F and issue G

Change Topics affected

Added Cortex-A7 to the table of key features for the current ARM processors.

1.1 About the ARM architectures

Table A-8 Differences between issue D and issue F

Change Topics affected

Where appropriate:

  • prefixed Thumb with 16-bit

  • changed Thumb-2 to 32-bit Thumb

  • changed Thumb-2EE to ThumbEE.

Various topics

Table A-9 Differences between issue C and issue D

Change Topics affected

Added Cortex-A15 and Cortex-R7 to the processor list.

1.1 About the ARM architectures

Removed ARMulator ISS from document for ARM Compiler 5.0.

Removed DCD 0 for reserved vector.

5.4 Vector table for ARMv6 and earlier, ARMv7-A and ARMv7-R profiles

Table A-10 Differences between issue B and issue C

Change Topics affected

Abbreviated RealView ICE to RVI. Also, mentioned DSTREAM when mentioning RVI.

Table A-11 Differences between issue A and issue B

Change Topics affected

Added note that the overall layout of the memory maps of devices based around the ARMv6-M and ARMv7-M architectures are fixed.

2.7 Tailoring the image memory map to your target hardware

Added links to Scatter file with link to bit-band objects, ARMARMv7-M, and ARMARMv6-M.

2.7 Tailoring the image memory map to your target hardware

Added links to Scatter file with link to bit-band objects.

2.8 About the scatter-loading description syntax

Added a new topic called Scatter file with link to bit-band objects.

2.12 Scatter file with link to bit-band objects

For SYS_ELAPSED, clarified that R0 contains 0 on success and -1 on failure.

7.9 SYS_ELAPSED (0x30)

Clarified that the linker uses a version of the library setup code rather than the __user_initial_stackheap() function when tailoring the stack and heap placement in the scatter file.

2.13 Reset and initialization
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