7.8 Inline assembler register restrictions in C and C++ code

Registers such as r0-r3, sp, lr, and the NZCV flags in the CPSR must be used with caution.

If C or C++ expressions are used, these might be used as temporary registers and NZCV flags might be corrupted by the compiler when evaluating the expression.

The pc, lr, and sp registers cannot be explicitly read or modified using inline assembly code because there is no direct access to any physical registers. However, you can use the intrinsics __current_pc, __current_sp, and __return_address to read these registers.

Related concepts
7.7 Restrictions on inline assembly operations in C and C++ code
7.9 Inline assembler processor mode restrictions in C and C++ code
7.10 Inline assembler Thumb instruction set restrictions in C and C++ code
7.11 Inline assembler Vector Floating-Point (VFP) restrictions in C and C++ code
7.12 Inline assembler instruction restrictions in C and C++ code
7.13 Miscellaneous inline assembler restrictions in C and C++ code
7.14 Inline assembler and register access in C and C++ code
Related reference
10.108 __current_pc intrinsic
10.109 __current_sp intrinsic
10.131  __return_address intrinsic
Non-ConfidentialPDF file icon PDF versionARM DUI0472J
Copyright © 2010-2013 ARM. All rights reserved.