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|Home > Compiler Command-line Options > --cpu=name compiler option|
Enables code generation for the selected ARM processor or architecture.
Where name is the name of a processor or architecture:
name is the name of a processor, enter it as shown on
ARM data sheets, for example,
name is the name of an architecture, it must belong to
the list of architectures shown in the following table.
Processor and architecture names are not case-sensitive.
Wildcard characters are not accepted.
Table 8-3 Supported ARM architectures
||ARMv4 without Thumb||SA-1100|
||ARMv4 with Thumb||ARM7TDMI, ARM9TDMI, ARM720T, ARM740T, ARM920T, ARM922T, ARM940T, SC100|
||ARMv5 with Thumb and interworking||-|
||ARMv5 with Thumb, interworking, DSP multiply, and double-word instructions||ARM9E, ARM946E-S, ARM966E-S|
ARMv5 with Thumb, interworking, DSP multiply, double-word instructions, and Jazelle® extensions
armcc cannot generate Java bytecodes.
|ARM926EJ-S, ARM1026EJ-S, SC200|
||ARMv6 with Thumb, interworking, DSP multiply, double-word instructions, unaligned and mixed-endian support, Jazelle, and media extensions||ARM1136J-S, ARM1136JF-S|
||ARMv6 micro-controller profile with Thumb only, plus processor state instructions||Cortex-M1 without OS extensions, Cortex-M0, SC000, Cortex-M0plus|
||ARMv6 micro-controller profile with Thumb only, plus processor state instructions and OS extensions||Cortex-M1 with OS extensions|
||ARMv6 with SMP extensions||MPCore|
||ARMv6 with Thumb (Thumb-2 technology)||ARM1156T2-S, ARM1156T2F-S|
||ARMv6 with Security Extensions||ARM1176JZF-S, ARM1176JZ-S|
||ARMv7 with Thumb (Thumb-2 technology) only, and without hardware divide||-|
||ARMv7 application profile supporting virtual MMU-based memory systems, with ARM, Thumb (Thumb-2 technology) and ThumbEE, DSP support, and 32-bit SIMD support||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15|
||Enables the use of the
||Cortex-A5, Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15|
||ARMv7 real-time profile with ARM, Thumb (Thumb-2 technology), DSP support, and 32-bit SIMD support||Cortex-R4, Cortex-R4F, Cortex-R7|
||ARMv7 micro-controller profile with Thumb (Thumb-2 technology) only and hardware divide||Cortex-M3, SC300|
||ARMv7-M enhanced with DSP (saturating and 32-bit SIMD) instructions||Cortex-M4|
ARMv7 is not an actual ARM architecture.
--cpu=7 denotes the features that
are common to the ARMv7-A, ARMv7-R, and ARMv7-M architectures. By definition, any given feature used
--cpu=7 exists on the ARMv7-A, ARMv7-R, and ARMv7-M architectures.
7-A.security is not an actual ARM architecture, but rather, refers to
7-A plus Security Extensions.
if you do not specify a
To obtain a full list of architectures and processors, use the
The following general points apply to processor and architecture options:
Selecting the processor selects the appropriate architecture, Floating-Point Unit (FPU), and memory organization.
values include all current ARM product names or architecture versions.
Other ARM architecture-based processors, such as the Marvell Feroceon and the Marvell XScale, are also supported.
If you specify a processor
--cpu option, the generated code is optimized for that
processor. This enables the compiler to use specific
coprocessors or instruction scheduling for optimum performance.
If you specify an architecture name for the
--cpu option, the generated code
can run on any processor supporting that architecture. For example,
produces code that can be used by the ARM926EJ-S® processor.
Some specifications of
--cpu imply an
For example, when building with the
Any explicit FPU, set with
--fpu on the command line, overrides an implicit
--fpu option is specified and no
--cpu option is
--fpu=softvfp is used.
Specifying a processor or architecture that supports Thumb instructions, such as
--cpu=ARM7TDMI, does not make the compiler generate Thumb code. It only enables features
of the processor to be used, such as long multiply. Use the
--thumb option to
generate Thumb code, unless the processor is a Thumb-only processor, for example Cortex-M4. In this
--thumb is not required.
Specifying the target processor or architecture might make the generated object code incompatible with other ARM processors. For example, code generated for architecture ARMv6 might not run on an ARM920T processor, if the generated object code includes instructions specific to ARMv6. Therefore, you must choose the lowest common denominator processor suited to your purpose.
If you are building for mixed ARM/Thumb systems for processors that support ARMv4T or ARMv5T,
then you must specify the interworking option
--apcs=/interwork. By default, this
is enabled for processors that support ARMv5T or above.
If you build for Thumb, that is with the
--thumb option on the command line,
the compiler generates as much of the code as
possible using the Thumb instruction set. However, the compiler might generate ARM code for some parts of the
compilation. For example, if you are generating code for a 16-bit Thumb processor and using VFP, any
function containing floating-point operations is compiled for ARM.
If the architecture only supports Thumb, you do not have to specify
on the command line. For example, if building for ARMv7-M with
--cpu=7-M, you do
not have to specify
--thumb on the command line, because ARMv7-M only supports
Thumb. Similarly, ARMv6-M and other Thumb-only architectures.
You cannot specify both a processor and an architecture on the same command-line.