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The Advanced SIMD and VFP extensions record the following floating-point exceptions in the FPSCR cumulative flags:
The exception is caused if the result of an operation has no mathematical value or cannot be represented.
The exception is caused if a divide operation has a zero divisor and a dividend that is not zero, an infinity or a NaN.
The exception is caused if the absolute value of the result of an operation, produced after rounding, is greater than the maximum positive normalized number for the destination precision.
The exception is caused if the absolute value of the result of an operation, produced before rounding, is less than the minimum positive normalized number for the destination precision, and the rounded result is inexact.
The exception is caused if the result of an operation is not equivalent to the value that would be produced if the operation were performed with unbounded precision and exponent range.
The exception is caused if a denormalized input operand is replaced in the computation by a zero.
In the Assembler Reference, in the descriptions of the instructions that can cause floating-point exceptions, there is a subsection listing the exceptions. If there is no Floating-point exceptions subsection in an instruction description, that instruction cannot cause any floating-point exception.
The Technical Reference Manual for your VFP coprocessor.