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Home > Writing ARM Assembly Language > Load immediate 32-bit values to a register using LDR Rd, =const |
The LDR Rd,=
pseudo-instruction
can construct any 32-bit numeric value in a single instruction.
You can use this pseudo-instruction to generate constants that are
out of range of the const
MOV
and MVN
instructions.
The LDR
pseudo-instruction generates the most
efficient single instruction for the specified immediate value:
If the immediate value can be constructed with a
single MOV
or MVN
instruction, the assembler
generates the appropriate instruction.
If the immediate value cannot be constructed with
a single MOV
or MVN
instruction, the assembler:
places the value in a literal pool (a portion of memory embedded in the code to hold constant values)
generates an LDR
instruction with a
PC-relative address that reads the constant from the literal pool.
For example:
LDR rn
, [pc, #offset to literal pool] ; load registern
with one word ; from the address [pc + offset]
You must ensure that there is a literal pool within range
of the LDR
instruction generated by the assembler.
Assembler Reference: