ARM® Compiler toolchain Using the Assembler

Version 5.0

List of Topics

Conventions and feedback
Overview of the Assembler
About the ARM Compiler toolchain assemblers
Key features of the assembler
How the assembler works
Directives that can be omitted in pass 2 of the assembler
Overview of the ARM Architecture
About the ARM architecture
ARM, Thumb, and ThumbEE instruction sets
Changing between ARM, Thumb, and ThumbEE state
Processor modes, and privileged and unprivileged software execution
Processor modes in ARMv6-M and ARMv7-M
NEON technology
VFP coprocessor
ARM registers
General-purpose registers
Register accesses
Predeclared core register names
Predeclared extension register names
Predeclared XScale register names
Predeclared coprocessor names
Program Counter
Application Program Status Register
The Q flag
Current Program Status Register
Saved Program Status Registers (SPSRs)
Instruction set overview
Media processing instructions
Access to the inline barrel shifter
Structure of Assembly Language Modules
Syntax of source lines in assembly language
ELF sections and the AREA directive
An example ARM assembly language module
Writing ARM Assembly Language
Unified Assembler Language
Subroutines calls
Load immediates into registers
Load immediate values using MOV and MVN
Load 32-bit values to a register using MOV32
Load immediate 32-bit values to a register using LDR Rd, =const
Literal pools
Load addresses into registers
Load addresses to a register using ADR
Load addresses to a register using ADRL
Load addresses to a register using LDR Rd, =label
Other ways to Load and store registers
Load and store multiple register instructions
Load and store multiple instructions available in ARM and Thumb
Stack implementation using LDM and STM
Stack operations for nested subroutines
Block copy with LDM and STM
Memory accesses
Read-Modify-Write procedure
Optional hash
Use of macros
Test-and-branch macro example
Unsigned integer division macro example
Instruction and directive relocations
Symbol versions
Frame directives
Exception tables and Unwind tables
Assembly language changes after RVCTv2.1
Condition Codes
Conditional instructions
Conditional execution in ARM state
Conditional execution in Thumb state
Updates to the ALU status flags
Condition code suffixes
Condition code meanings
Benefits of using conditional execution
Illustration of the benefits of using conditional instructions
Optimization for execution speed
Using the Assembler
Assembler command line syntax
Assembler commands listed in groups
Specify command line options with an environment variable
Using stdin to input source code to the assembler
Built-in variables and constants
Versions of armasm
Diagnostic messages
Interlocks diagnostics
IT block generation
Thumb branch target alignment
Thumb code size diagnostics
ARM and Thumb instruction portability diagnostics
Instruction width
2 pass assembler diagnostics
Using the C preprocessor
Address alignment
Instruction width selection in Thumb
Symbols, Literals, Expressions, and Operators
Symbol naming rules
Numeric constants
Assembly time substitution of variables
Register-relative and PC-relative expressions
Labels for PC-relative addresses
Labels for register-relative addresses
Labels for absolute addresses
Local labels
Syntax of local labels
String expressions
String literals
Numeric expressions
Numeric literals
Floating-point literals
Logical expressions
Logical literals
Unary operators
Binary operators
Multiplicative operators
String manipulation operators
Shift operators
Addition, subtraction, and logical operators
Relational operators
Boolean operators
Operator precedence
Difference between operator precedence in armasm and C
NEON and VFP Programming
Architecture support for NEON and VFP
Half-precision extension
Fused Multiply-Add extension
Extension register bank mapping
NEON views of the register bank
VFP views of the extension register bank
Load values to VFP and NEON registers
Conditional execution of NEON and VFP instructions
Floating-point exceptions
NEON and VFP data types
NEON vectors
Normal NEON instructions
Long NEON instructions
Wide NEON instructions
Narrow NEON instructions
Saturating NEON instructions
NEON scalars
Extended notation
Polynomial arithmetic over {0,1}
NEON and VFP system registers
FPSCR, the floating-point status and control register
FPEXC, the floating-point exception register
FPSID, the floating-point system ID register
Flush-to-zero mode
When to use flush-to-zero mode
The effects of using flush-to-zero mode
Operations not affected by flush-to-zero mode
VFP vector mode
Vectors in the VFP extension register bank
VFP vector wrap-around
VFP vector stride
Restriction on vector length
Control of scalar, vector, and mixed operations
VFP directives and vector notation
Pre-UAL VFP mnemonics
Vector notation
Revisions for Using the Assembler

List of Tables

1. ARM processor modes
2. Predeclared core registers
3. Predeclared extension registers
4. Predeclared XScale registers
5. Predeclared Wireless MMX registers
6. Predeclared coprocessor registers
7. Instruction groups
8. ARM state immediate values (8-bit)
9. ARM state immediate values in MOV instructions
10. 32-bit Thumb immediate values
11. 32-bit Thumb immediate values in MOV instructions
12. Stack-oriented suffixes and equivalent addressing mode suffixes
13. Suffixes for load and store multiple instructions
14. Changes from earlier ARM assembly language
15. Relaxation of requirements
16. Differences between pre-UAL Thumb syntax and UAL syntax
17. Condition code suffixes
18. Condition codes
19. Conditional branches only
20. All instructions conditional
21. Built-in variables
22. Built-in Boolean constants
23. Predefined macros
24. {TARGET_ARCH_ARM} in relation to {TARGET_ARCH_THUMB}
25. Command-line options
26. armcc equivalent command line options
27. Unary operators that return strings
28. Unary operators that return numeric or logical values
29. Multiplicative operators
30. String manipulation operators
31. Shift operators
32. Addition, subtraction, and logical operators
33. Relational operators
34. Boolean operators
35. Operator precedence in armasm
36. Operator precedence in C
37. NEON data types
38. VFP data types
39. NEON saturation ranges
40. Pre-UAL VFP mnemonics
41. Floating-point values for use with FCONST
42. Differences between issue C and issue D
43. Differences between issue B and issue C
44. Differences between issue A and issue B

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Product Status

The information in this document is final, that is for a developed product.

Revision History
Revision AMay 2010ARM Compiler toolchain v4.1 Release
Revision B30 September 2010Update 1 for ARM Compiler toolchain v4.1
Revision C28 January 2011Update 2 for ARM Compiler toolchain v4.1 Patch 3
Revision D30 April 2011ARM Compiler toolchain v5.0 Release
Revision E29 July 2011Update 1 for ARM Compiler toolchain v5.0
Copyright © 2010-2011 ARM. All rights reserved.ARM DUI 0473E