11.18 BFI

Bit Field Insert.

Syntax

BFI{cond} Rd, Rn, #lsb, #width

where:

cond

is an optional condition code.

Rd

is the destination register.

Rn

is the source register.

lsb

is the least significant bit that is to be copied.

width

is the number of bits to be copied. width must not be 0, and (width+lsb) must be less than or equal to 32.

Operation

Inserts adjacent bits from one register into another. width bits in Rd, starting at lsb, are replaced by width bits from Rn, starting at bit[0]. Other bits in Rd are unchanged.

Register restrictions

You cannot use PC for any register.

You can use SP in the BFI ARM instruction but this is deprecated in ARMv6T2 and above. You cannot use SP in the BFI Thumb instruction.

Condition flags

The BFI instruction does not change the flags.

Architectures

This ARM instruction is available in ARMv6T2 and above.

This 32-bit Thumb instruction is available in ARMv6T2 and above.

There is no 16-bit version of this instruction in Thumb.

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