11.33 DMB

Data Memory Barrier.

Syntax

DMB{cond} {option}

where:

cond

is an optional condition code.

Note:

cond is permitted only in Thumb code. This is an unconditional instruction in ARM code.

option

is an optional limitation on the operation of the hint. Permitted values are:

SY

Full system DMB operation. This is the default and can be omitted.

ST

DMB operation that waits only for stores to complete.

ISH

DMB operation only to the inner shareable domain.

ISHST

DMB operation that waits only for stores to complete, and only to the inner shareable domain.

NSH

DMB operation only out to the point of unification.

NSHST

DMB operation that waits only for stores to complete and only out to the point of unification.

OSH

DMB operation only to the outer shareable domain.

OSHST

DMB operation that waits only for stores to complete, and only to the outer shareable domain.

Operation

Data Memory Barrier acts as a memory barrier. It ensures that all explicit memory accesses that appear in program order before the DMB instruction are observed before any explicit memory accesses that appear in program order after the DMB instruction. It does not affect the ordering of any other instructions executing on the processor.

Alias

The following alternative values of option are supported, but ARM recommends that you do not use them:

  • SH is an alias for ISH.

  • SHST is an alias for ISHST.

  • UN is an alias for NSH.

  • UNST is an alias for NSHST.

Architectures

This ARM and 32-bit Thumb instruction is available in ARMv7.

There is no 16-bit version of this instruction in Thumb.

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