11.52 MCR and MCR2

Move to Coprocessor from ARM Register. Depending on the coprocessor, you might be able to specify various additional operations.

Syntax

MCR{cond} coproc, #opcode1, Rt, CRn, CRm{, #opcode2}

MCR2{cond} coproc, #opcode1, Rt, CRn, CRm{, #opcode2}

where:

cond

is an optional condition code. In ARM code, cond is not permitted for MCR2.

coproc

is the name of the coprocessor the instruction is for. The standard name is pn, where n is an integer in the range 0 to 15.

opcode1

is a 3-bit coprocessor-specific opcode.

opcode2

is an optional 3-bit coprocessor-specific opcode.

Rt

is an ARM source register. Rt must not be PC.

CRn, CRm

are coprocessor registers.

Usage

The use of these instructions depends on the coprocessor. See the coprocessor documentation for details.

Architectures

The MCR ARM instruction is available in all versions of the ARM architecture.

The MCR2 ARM instruction is available in ARMv5T and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above.

There are no 16-bit versions of these instructions in Thumb.

Non-ConfidentialPDF file icon PDF versionARM DUI0473M
Copyright © 2010-2016 ARM Limited or its affiliates. All rights reserved.