11.77 QADD

Signed saturating addition.

Syntax

QADD{cond} {Rd}, Rm, Rn

where:

cond

is an optional condition code.

Rd

is the destination register.

Rm, Rn

are the registers holding the operands.

Operation

The QADD instruction adds the values in Rm and Rn. It saturates the result to the signed range –231x ≤ 231–1.

Note:

All values are treated as two’s complement signed integers by this instruction.

Register restrictions

You cannot use PC for any operand.

You can use SP in ARM instructions but this is deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

Q flag

If saturation occurs, this instruction sets the Q flag. To read the state of the Q flag, use an MRS instruction.

Architectures

This ARM instruction is available in ARMv6 and above, and E variants of ARMv5T.

This 32-bit Thumb instruction is available in ARMv6T2 and above. For the ARMv7-M architecture, it is only available in an ARMv7E-M implementation.

There is no 16-bit version of this instruction in Thumb.

Example

    QADD    r0, r1, r9
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