11.135 STM

Store Multiple registers.

Syntax

STM{addr_mode}{cond} Rn{!}, reglist{^}

where:

addr_mode

is any one of the following:

IA

Increment address After each transfer. This is the default, and can be omitted.

IB

Increment address Before each transfer (ARM only).

DA

Decrement address After each transfer (ARM only).

DB

Decrement address Before each transfer.

You can also use the stack-oriented addressing mode suffixes, for example when implementing stacks.

cond

is an optional condition code.

Rn

is the base register, the ARM register holding the initial address for the transfer. Rn must not be PC.

!

is an optional suffix. If ! is present, the final address is written back into Rn.

reglist

is a list of one or more registers to be stored, enclosed in braces. It can contain register ranges. It must be comma-separated if it contains more than one register or register range. Any combination of registers R0 to R15 (PC) can be transferred in ARM state, but there are some restrictions in Thumb state.

^

is an optional suffix, available in ARM state only. You must not use it in User mode or System mode. Data is transferred into or out of the User mode registers instead of the current mode registers.

Restrictions on reglist in 32-bit Thumb instructions

In 32-bit Thumb instructions:

  • The SP cannot be in the list.

  • The PC cannot be in the list.

  • There must be two or more registers in the list.

If you write an STM instruction with only one register in reglist, the assembler automatically substitutes the equivalent STR instruction. Be aware of this when comparing disassembly listings with source code.

You can use the --diag_warning 1645 assembler command-line option to check when an instruction substitution occurs.

Restrictions on reglist in ARM instructions

ARM store instructions can have SP and PC in the reglist but these instructions that include SP or PC in the reglist are deprecated in ARMv6T2 and above.

16-bit instruction

A 16-bit version of this instruction is available in Thumb code.

The following restrictions apply to the 16-bit instruction:

  • All registers in reglist must be Lo registers.

  • Rn must be a Lo register.

  • addr_mode must be omitted (or IA), meaning increment address after each transfer.

  • Writeback must be specified for STM instructions.

Note:

16-bit Thumb STM instructions with writeback that specify Rn as the lowest register in the reglist are deprecated in ARMv6T2 and above.

In addition, the PUSH and POP instructions are subsets of the STM and LDM instructions and can therefore be expressed using the STM and LDM instructions. Some forms of PUSH and POP are also 16-bit instructions.

Storing the base register, with writeback

In ARM or 16-bit Thumb instructions, if Rn is in reglist, and writeback is specified with the ! suffix:

  • If the instruction is STM{addr_mode}{cond} and Rn is the lowest-numbered register in reglist, the initial value of Rn is stored. These instructions are deprecated in ARMv6T2 and above.

  • Otherwise, the stored value of Rn cannot be relied on, so these instructions are not permitted.

32-bit Thumb instructions are not permitted if Rn is in reglist, and writeback is specified with the ! suffix.

Correct example

    STMDB   r1!,{r3-r6,r11,r12}

Incorrect example

    STM     r5!,{r5,r4,r9} ; value stored for R5 unknown
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