12.1 Summary of NEON instructions

Most NEON instructions are not available in VFP.

The following table shows a summary of the NEON instructions that are not available in VFP:

Table 12-1 Summary of NEON instructions

Mnemonic Brief description
VABA, VABL Absolute difference and Accumulate, Absolute difference and Accumulate Long
VABD, VABDL Absolute difference, Absolute difference Long
VABS Absolute value
VACGE, VACGT Absolute Compare Greater than or Equal, Greater Than
VACLE, VACLT Absolute Compare Less than or Equal, Less Than (pseudo-instructions)
VADDHN Add, select High half
VADDL, VADDW Add Long, Add Wide
VAND Bitwise AND
VAND Bitwise AND (pseudo-instruction)
VBIC Bitwise Bit Clear (register)
VBIC Bitwise Bit Clear (immediate)
VBIF Bitwise Insert if False
VBIT Bitwise Insert if True
VBSL Bitwise Select
VCEQ Compare Equal (immediate, #0)
VCEQ Compare Equal (register)
VCGE Compare Greater than or Equal (immediate, #0)
VCGE Compare Greater than or Equal (register)
VCGT Compare Greater Than (immediate, #0)
VCGT Compare Greater Than (register)
VCLE Compare Less than or Equal (immediate, #0)
VCLE Compare Less than or Equal (register)
VCLS Count Leading Sign bits
VCNT Count set bits
VCLT Compare Less Than (immediate, #0)
VCLT Compare Less Than (register)
VCLZ Count Leading Zeros
VCVT Convert fixed-point or integer to floating point, floating-point to integer or fixed-point
VCVT Convert between half-precision and single-precision floating-point numbers
VDUP Duplicate scalar to all lanes of vector
VEOR Bitwise Exclusive OR
VEXT Extract
VFMA, VFMS Fused Multiply Accumulate, Fused Multiply Subtract (vector)
VHADD Halving Add
VHSUB Halving Subtract
VLDn Load (single n-element structure to one lane)
VLDn Load (single n-element structure to all lanes)
VLDn Load (multiple n-element structures)
VMAX, VMIN Maximum, Minimum
VMLA Multiply Accumulate (by scalar)
VMLA Multiply Accumulate (vector)
VMLAL Multiply Accumulate Long (by scalar)
VMLAL Multiply Accumulate Long (vector)
VMLS Multiply Subtract (by scalar)
VMLS Multiply Subtract (vector)
VMLSL Multiply Subtract Long (by scalar)
VMLSL Multiply Subtract Long (vector)
VMOV Move (immediate)
VMOV Move (register)
VMOVL Move Long (register)
VMOVN Move Narrow (register)
VMUL Multiply (vector)
VMUL Multiply (by scalar)
VMULL Multiply Long (vector)
VMULL Multiply Long (by scalar)
VMVN Move Negative (immediate)
VMVN Move Negative (register)
VNEG Negate
VORN Bitwise OR NOT (pseudo-instruction)
VORR Bitwise OR (register)
VORR Bitwise OR (immediate)
VPADAL Pairwise Add and Accumulate Long
VPADD Pairwise Add
VPADDL Pairwise Add Long
VPMAX, VPMIN Pairwise Maximum, Pairwise Minimum
VQABS Absolute value, saturate
VQADD Add, saturate
VQDMLAL, VQDMLSL Saturating Doubling Multiply Accumulate, and Multiply Subtract

Saturating Doubling Multiply returning High half

VQDMULL Saturating Doubling Multiply
VQMOV{U}N Saturating Move and Narrow (register)
VQNEG Negate, saturate

Saturating Doubling Multiply returning High half

VQRSHL Shift Left, Round, saturate (by signed variable)
VQRSHR{U}N Shift Right, Round, saturate (by immediate)
VQSHL Shift Left, saturate (by signed variable)
VQSHL{U} Shift Left, saturate (by immediate)
VQSHR{U}N Shift Right, Narrow, saturate (by immediate)
VQSUB Subtract, saturate
VRADDHN Add, select High half, Round
VRECPE Reciprocal Estimate
VRECPS Reciprocal Step
VREV16, VREV32, VREV64 Reverse elements within halfwords, words, doublewords
VRHADD Halving Add, Round
VRSHL Shift Left and Round (by signed variable)
VRSHR Shift Right and Round (by immediate)
VRSHRN Shift Right, Round, Narrow (by immediate)
VRSQRTE Reciprocal Square Root Estimate
VRSQRTS Reciprocal Square Root Step
VRSRA Shift Right, Round, and Accumulate (by immediate)
VRSUBHN Subtract, select High half, Round
VSHL Shift Left (by immediate)
VSHL Shift Left (by signed variable)
VSHLL Shift Left Long (by immediate)
VSHR Shift Right (by immediate)
VSHRN Shift Right, Narrow (by immediate)
VSLI Shift Left and Insert
VSRA Shift Right, Accumulate (by immediate)
VSRI Shift Right and Insert
VSTn Store (multiple n-element structures)
VSTn Store (single n-element structure to one lane)
VSUB Subtract
VSUBHN Subtract, select High half
VSUBL, VSUBW Subtract Long, Subtract Wide
VSWP Swap vectors
VTBL, VTBX Vector table look-up
VTRN Vector transpose
VTST Test bits
VUZP Vector de-interleave
VZIP Vector interleave
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