12.46 VLDR pseudo-instruction

Pseudo-instruction that loads a constant value into every element of a 64-bit NEON vector.

Note:

This section describes the VLDR pseudo-instruction only.

Syntax

VLDR{cond}.datatype Dd,=constant

where:

datatype

must be one of In, Sn, Un, or F32.

n

must be one of 8, 16, 32, or 64.

cond

is an optional condition code.

Dd

is the extension register to be loaded.

constant

is an immediate value of the appropriate type for datatype.

Operation

If an instruction (for example, VMOV) is available that can generate the constant directly into the register, the assembler uses it. Otherwise, the assembler generates a doubleword literal pool entry containing the constant and loads the constant using a VLDR instruction.

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