14.1 About Wireless MMX Technology instructions

Marvell Wireless MMX Technology is a set of Single Instruction Multiple Data (SIMD) instructions available on selected XScale processors that improve the performance of some multimedia applications.

Wireless MMX Technology uses 64-bit registers to enable it to operate on multiple data elements in a packed format.

The assembler supports Marvell Wireless MMX Technology instructions to assemble code to run on the PXA270 processor. This processor implements the ARMv5TE architecture, with MMX extensions. Wireless MMX Technology uses ARM coprocessors 0 and 1 to support its instruction set and data types. ARM Compiler toolchain supports Wireless MMX Technology Control and Single Instruction Multiple Data (SIMD) Data registers, and include new directives for Wireless MMX Technology development. There is also enhanced support for load and store instructions.

When using the assembler, be aware that:

  • Wireless MMX Technology instructions are only assembled if you specify the supported processor (armasm --cpu PXA270).

  • The PXA270 processor supports code written in ARM or Thumb only.

  • Most Wireless MMX Technology instructions can be executed conditionally, depending on the state of the ARM flags. The Wireless MMX Technology condition codes are identical to the ARM condition codes.

Wireless MMX 2 Technology is an upgraded version of Wireless MMX Technology.

This documentation contains information on the Wireless MMX Technology support provided by the assembler in the ARM Compiler toolchain. It does not provide a detailed description of the Wireless MMX Technology. Wireless MMX Technology Developer Guide contains information about the programmers’ model and a full description of the Wireless MMX Technology instruction set.

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