3.28 --fpu=name

Specifies the target FPU architecture.

To obtain a full list of FPU architectures use the --fpu=list option.

Syntax

--fpu=name

Where name is one of:

None

Selects no floating-point option. No floating-point code is to be used.

VFPv2

Selects a hardware floating-point unit conforming to architecture VFPv2.

VFPv3
Selects a hardware vector floating-point unit conforming to architecture VFPv3. VFPv3 is backwards compatible with VFPv2 except that VFPv3 cannot trap floating-point exceptions.
VFPv3_FP16
Selects a hardware vector floating-point unit conforming to architecture VFPv3 that also provides the half-precision extensions.
VFPv3_D16
Selects a hardware vector floating-point unit conforming to VFPv3-D16 architecture.
VFPv3_D16_FP16
Selects a hardware vector floating-point unit conforming to VFPv3-D16 architecture, that also provides the half-precision extensions.
VFPv4
Selects a hardware floating-point unit conforming to the VFPv4 architecture.
VFPv4_D16
Selects a hardware floating-point unit conforming to the VFPv4-D16 architecture.
FPv4-SP
Selects a hardware floating-point unit conforming to the single precision variant of the FPv4 architecture.
FPv5_D16
Selects a hardware floating-point unit conforming to the FPv5-D16 architecture.
FPv5-SP
Selects a hardware floating-point unit conforming to the single precision variant of the FPv5 architecture.
SoftVFP
Selects software floating-point support where floating-point operations are performed by a floating-point library, fplib. This is the default if you do not specify a --fpu option, or if you select a CPU that does not have an FPU.
SoftVFP+VFPv2

Selects a hardware floating-point unit conforming to VFPv2, with software floating-point linkage. Select this option if you are interworking Thumb code with ARM code on a system that implements a VFP unit.

SoftVFP+VFPv3
Selects a hardware vector floating-point unit conforming to VFPv3, with software floating-point linkage.
SoftVFP+VFPv3_FP16
Selects a hardware vector floating-point unit conforming to VFPv3-fp16, with software floating-point linkage.
SoftVFP+VFPv3_D16
Selects a hardware vector floating-point unit conforming to VFPv3-D16, with software floating-point linkage.
SoftVFP+VFPv3_D16_FP16
Selects a hardware vector floating-point unit conforming to VFPv3-D16-fp16, with software floating-point linkage.
SoftVFP+VFPv4
Selects a hardware floating-point unit conforming to FPv4, with software floating-point linkage.
SoftVFP+VFPv4_D16
Selects a hardware floating-point unit conforming to VFPv4-D16, with software floating-point linkage.
SoftVFP+FPv4-SP
Selects a hardware floating-point unit conforming to FPv4-SP, with software floating-point linkage.
SoftVFP+FPv5_D16
Selects a hardware floating-point unit conforming to FPv5-D16, with software floating-point linkage.
SoftVFP+FPv5-SP
Selects a hardware floating-point unit conforming to FPv5-SP, with software floating-point linkage.

To obtain a full list of FPU architectures use the --fpu=list option.

Usage

This option selects disassembly for a specific FPU architecture. It affects how fromelf interprets the instructions it finds in the input files.

If you specify this option, it overrides any implicit FPU option that appears on the command line, for example, where you use the --cpu option.

Any FPU explicitly selected using the --fpu option always overrides any FPU implicitly selected using the --cpu option. For example, the options --disassemble --cpu=ARM1136JF-S --fpu=SoftVFP disassembles code that uses the software floating-point library fplib, even though the choice of CPU implies the use of architecture VFPv2.

Restrictions

NEON support is disabled for softvfp.

Default

The default target FPU architecture is derived from use of the --cpu option.

If the CPU you specify with --cpu has a VFP coprocessor, the default target FPU architecture is the VFP architecture for that CPU. For example, the option --cpu ARM1136JF-S implies the option --fpu VFPv2. If a VFP coprocessor is present, VFP instructions are generated.

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