Floating-point absolute value, negate, and square root.
These instructions can be scalar, vector, or mixed.
SyntaxVop{cond}.F32Sd,Sm
Vop{cond}.F64Dd,Dm
where:
opis one of
ABS,NEG, orSQRT.condis an optional condition code.
Sd,Smare the single-precision registers for the result and operand.
Dd,Dmare the double-precision registers for the result and operand.
The VABS instruction takes the contents of SmDmSdDd
The VNEG instruction takes the contents of SmDmSdDd
The VSQRT instruction takes the square root of
the contents of SmDmSdDd
In the case of a VABS and VNEG instruction,
if the operand is a NaN, the sign bit is determined in each case
as above, but no exception is produced.
VABS and VNEG instructions cannot
produce any exceptions.
VSQRT instructions can produce Invalid Operation
or Inexact exceptions.
- Concepts
Using the Assembler:
- Reference:
PDF version