The VLDR pseudo-instruction loads a constant
value into every element of a 64-bit NEON vector, or into a VFP
single-precision or double-precision register.
Note
This section describes the VLDR pseudo-instruction
only.
SyntaxVLDR{cond}.datatypeDd,=constant
VLDR{cond}.datatypeSd,=constant
where:
datatypemust be one of:
InNEON only
SnNEON only
UnNEON only
F32NEON or VFP
F64VFP only
nmust be one of 8, 16, 32, or 64.
condis an optional condition code.
DdorSdis the extension register to be loaded.
constantis an immediate value of the appropriate type for
datatype
If an instruction (for example, VMOV) is available
that can generate the constant directly into the register, the assembler
uses it. Otherwise, it generates a doubleword literal pool entry
containing the constant and loads the constant using a VLDR instruction.
- Reference:
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