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VSHL, VQSHL, VQSHLU, and VSHLL (by immediate)

Vector Shift Left (by immediate) instructions take each element in a vector of integers, left shift them by an immediate value, and place the results in the destination vector.

For VSHL (Vector Shift Left), bits shifted out of the left of each element are lost.

For VQSHL (Vector Saturating Shift Left) and VQSHLU (Vector Saturating Shift Left Unsigned), the sticky QC flag (FPSCR bit[27]) is set if saturation occurs.

For VSHLL (Vector Shift Left Long), values are sign or zero extended.

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V{Q}SHL{U}{cond}.datatype {Qd}, Qm, #imm

V{Q}SHL{U}{cond}.datatype {Dd}, Dm, #imm

VSHLL{cond}.datatype Qd, Dm, #imm

where:

Q

if present, indicates that if any of the results overflow, they are saturated.

U

only permitted if Q is also present. Indicates that the results are unsigned even though the operands are signed.

cond

is an optional condition code.

datatype

must be one of:

I8, I16, I32, I64

for VSHL

S8, S16, S32

for VSHLL, VQSHL, or VQSHLU

U8, U16, U32

for VSHLL or VQSHL

S64

for VQSHL or VQSHLU

U64

for VQSHL.

Qd, Qm

are the destination and operand vectors, for a quadword operation.

Dd, Dm

are the destination and operand vectors, for a doubleword operation.

Qd, Dm

are the destination and operand vectors, for a long operation.

imm

is the immediate value specifying the size of the shift, in the range:

  • 1 to size(datatype) for VSHLL

  • 1 to (size(datatype) - 1) for VSHL, VQSHL, or VQSHLU.

0 is permitted, but the resulting code disassembles to VMOV or VMOVL.

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Reference:
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