| |||
| Home > ARM and Thumb Instructions > General data processing instructions > SEL | |||
Select bytes from each operand according to the state of the APSR GE flags.
SEL{cond} {Rd},Rn,Rm
where:
condis an optional condition code.
Rdis the destination register.
Rnis the register holding the first operand.
Rmis the register holding the second operand.
The SEL instruction selects bytes from or Rn according
to the APSR GE flags:Rm
if
GE[0] is set, Rd[7:0] come from Rn[7:0],
otherwise from Rm[7:0]
if GE[1] is set, Rd[15:8] come
from Rn[15:8], otherwise from Rm[15:8]
if GE[2] is set, Rd[23:16] come
from Rn[23:16], otherwise from Rm[23:16]
if GE[3] is set, Rd[31:24] come
from Rn[31:24], otherwise from Rm[31:24].
Use the SEL instruction after one of the signed
parallel instructions. You can use this to select maximum or minimum
values in multiple byte or halfword data.
You cannot use PC for any register.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
This ARM instruction is available in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.
There is no 16-bit Thumb version of this instruction.
SEL r0, r4, r5
SELLT r4, r0, r4
The following instruction sequence sets each byte in R4 equal
to the unsigned minimum of the corresponding bytes of R1 and R2:
USUB8 r4, r1, r2
SEL r4, r2, r1