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| Home > NEON and VFP Programming > Instructions shared by NEON and VFP > VLDR and VSTR | |||
Extension register load and store.
VLDR{cond}{.size}Fd, [Rn{, #offset}]
VSTR{cond}{.size}Fd, [Rn{, #offset}]
VLDR{cond}{.size}Fd,label
VSTR{cond}{.size}Fd,label
where:
condis an optional condition code.
sizeis an optional data size specifier. Must be 32 if is
an FdS register, or 64 otherwise.
Fdis the extension register to be loaded or saved.
For a NEON instruction, it must be a D register.
For a VFP instruction, it can be either a D or S register.
Rnis the ARM register holding the base address for the transfer.
offsetis an optional numeric expression. It must evaluate to a numeric value at assembly time. The value must be a multiple of 4, and lie in the range -1020 to +1020. The value is added to the base address to form the address used for the transfer.
labelis a PC-relative expression.
must
be aligned on a word boundary within ±1KB of the current instruction.label
The VLDR instruction loads an extension register
from memory. The VSTR instruction saves the contents
of an extension register to memory.
One word is transferred if is
an FdS register (VFP only). Two words are transferred
otherwise.
There is also an VLDR pseudo-instruction.
Using the Assembler: